Digital imaging systems for medical applications use amorphous silicon thin-film transistor (TFT) technology due to its
ability to be manufactured over large areas. However, TFT technology is far inferior to crystalline silicon CMOS
technology in terms of the speed, stability, noise susceptibility, and feature size. This work investigates the feasibility of
integrating an imaging array fabricated in CMOS technology with an a-Se detector. The design of a CMOS passive pixel
sensor (PPS) array is presented, in addition to how an 8×8 PPS array is integrated with the 75 micron thick stabilized
amorphous selenium detector. A non-linear increase in the dark current of 200 pA, 500 pA and 2 nA is observed with
0.27, 0.67 and 1.33 V/micron electric field respectively, which shows a successful integration of selenium layer with the
CMOS array. Results also show that the integrated Selenium-CMOS PPS array has good responsivity to optical light and
X-rays, leaving the door open for further research on implementing CMOS imaging architectures going forward.
Demonstrating that the PPS chips using CMOS technology can use a-Se as a detector is thus the first step in a promising
path of research, which should yield substantial and exciting results for the field. Though area may still prove
challenging, larger CMOS wafers can be manufactured and tiled to allow for a large enough size for certain diagnostic
imaging applications and potentially even large area applications like digital mammography.
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