Implementation and performance of FPGA-accelerated particle flow filter

Dimitrios Charalampidis; Vesselin P. Jilkov; Jiande Wu

doi:10.1117/12.2179546

2 September 2015 Implementation and performance of FPGA-accelerated particle flow filter

Dimitrios Charalampidis, Vesselin P. Jilkov, Jiande Wu

Proceedings Volume 9596, Signal and Data Processing of Small Targets 2015; 95960B (2015) https://doi.org/10.1117/12.2179546
Event: SPIE Optical Engineering + Applications, 2015, San Diego, California, United States

Abstract

The particle flow filters, proposed by Daum & Hwang, provide a powerful means for density-based nonlinear filtering but their computation is intense and may be prohibitive for real-time applications. This paper proposes a design for superfast implementation of the exact particle flow filter using a field-programmable gate array (FPGA) as a parallel environment to speedup computation. Simulation results from a nonlinear filtering example are presented to demonstrate that using FPGA can dramatically accelerate particle flow filters through parallelization at the expense of a tolerable loss in accuracy as compared to nonparallel implementation.

Citation Download Citation

Dimitrios Charalampidis, Vesselin P. Jilkov, and Jiande Wu "Implementation and performance of FPGA-accelerated particle flow filter", Proc. SPIE 9596, Signal and Data Processing of Small Targets 2015, 95960B (2 September 2015); https://doi.org/10.1117/12.2179546

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