SiGe p-i-n photodetectors have been fabricated on 300 mm (12”) diameter silicon (Si) wafers utilizing high throughput,
large-area complementary metal-oxide semiconductor (CMOS) technologies. These Ge photodetectors are designed to
operate in room temperature environments without cooling, and thus have potential size and cost advantages over
conventional cooled infrared detectors. The two-step fabrication process for the p-i-n photodetector devices, designed to
minimize the formation of defects and threading dislocations, involves low temperature epitaxial growth of a thin p+
(boron) Ge seed/buffer layer, followed by higher temperature deposition of a thicker Ge intrinsic layer. Scanning electron
microscopy (SEM) and transmission electron microscopy (TEM) demonstrated uniform layer compositions with well defined
layer interfaces and reduced dislocation density. Time-of-flight secondary ion mass spectroscopy (TOF-SIMS)
was likewise employed to analyze the doping levels of the p+ and n+ layers. Current-voltage (I-V) measurements
demonstrated that these SiGe photodetectors, when exposed to incident visible-NIR radiation, exhibited dark currents
down below 1 μA and significant enhancement in photocurrent at -1 V. The zero-bias photocurrent was also relatively
high, showing a minimal drop compared to that at -1 V bias.
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