Paper
2 April 2020 Massive metrology of 2D logic patterns on BEOL EUVL
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Abstract
At sub10nm nodes of Backend of Line (BEOL) using Extreme Ultraviolet Lithography (EUVL), the requirements of the process window of patterning are extremely tight for parameters such as Critical Dimension (CD) and Overlay which are traditionally managed for the semiconductor process. In addition to these parameters, because the latest BEOL pattern consists of a variety of space patterns, Edge Placement Error (EPE) of the tip feature of space pattern is the most critical to secure the contact between metal layer and contact or via layer. Because tip EPE is assumed to be affected by multiple factors such as pattern layout, the accuracy of Optical Proximity Correction (OPC), mask pattern, scanner tool conditions, and etching process conditions etc., the characterization of the patterning process and the establishing analysis method to find the root cause of EPE is of utmost importance before starting a high-volume manufacturing. However, general CDSEM metrology is only utilized to collect the limited number of data from several features which are predicted by simulation or searched by optical inspection tool. This implies the possibility of further process optimization is still covered inside of various 2D feature in BEOL. In this paper, we apply Die to Database(D2DB) EPE and show the necessity of massive data-based methodology to identify local process variability of 2D feature using e-beam metrology.
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Sayantan Das, Seulki Kang, Sandip Halder, Kotaro Maruyama, Philippe Leray, and Yuichiro Yamazaki "Massive metrology of 2D logic patterns on BEOL EUVL", Proc. SPIE 11325, Metrology, Inspection, and Process Control for Microlithography XXXIV, 113250J (2 April 2020); https://doi.org/10.1117/12.2554543
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KEYWORDS
Metrology

Extreme ultraviolet lithography

Logic

Scanning electron microscopy

Back end of line

Metals

Semiconducting wafers

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