Abstract
This paper provides an overview of the current state-of-the-art HYMOSS (Hybrid Mosaic On Stacked Silicon) Z-technology. In the first part of this paper, an introduction to the HYMOSS physical characteristics is presented. This includes a description of the stacked substrates (cube) and mounting hardware (module). The basic steps in manufacturing HYMOSS are covered. The paper concludes with a description of the two newest endeavors for HYMOSS technology: stacking of superconducting ICs, digital memory, and processor ICs.
© (1990) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
David E. Ludwig "Current HYMOSS Z-technology overview", Proc. SPIE 1339, Materials, Devices, Techniques, and Applications for Z-Plane Focal Plane Array Technology II, (1 November 1990); https://doi.org/10.1117/12.23017
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CITATIONS
Cited by 2 scholarly publications.
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KEYWORDS
Superconductors

Packaging

Sensors

Semiconducting wafers

Staring arrays

Silicon

Ceramics

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