Paper
9 July 1992 Comparative evaluation of e-beam charge reducing processes
Gilles R. Amblard, Laurent A. Guerin, Frederic P. Lalanne, Jean-Pierre Panabiere, Michel E. Guillaume, Philippe Romand, Andre P. Weill
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Abstract
The intrinsic registration capability of current e-beam lithographic tools has to approach or even go below the 0.10 micrometers value ( + 3(sigma) ). However, the actual level to level overlay measurements are generally found above this limit as resist materials trap the electric charges: the electron beam is deflected by the electrostatic forces, resulting in misalignment and distortion of the delineated patterns. Large pattern displacements can be observed depending on the experimental conditions. This paper aims to compare various charge reducing processes when used under exactly the same conditions (20 keV industrial machine and trilevel resist structure). No system appears as a perfect solution. There are partial solutions, but none is simple and satisfying; this contributes to the picture of electron- beam lithography as a marginal technique for IC manufacturing.
© (1992) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Gilles R. Amblard, Laurent A. Guerin, Frederic P. Lalanne, Jean-Pierre Panabiere, Michel E. Guillaume, Philippe Romand, and Andre P. Weill "Comparative evaluation of e-beam charge reducing processes", Proc. SPIE 1671, Electron-Beam, X-Ray, and Ion-Beam Submicrometer Lithographies for Manufacturing II, (9 July 1992); https://doi.org/10.1117/12.136038
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KEYWORDS
Semiconducting wafers

Lithography

Photoresist processing

Silicon

Electron beams

Tungsten

Control systems

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