Paper
25 March 2004 Photonic A/Ds employing S-SEED comparators
Author Affiliations +
Proceedings Volume 5277, Photonics: Design, Technology, and Packaging; (2004) https://doi.org/10.1117/12.523253
Event: Microelectronics, MEMS, and Nanotechnology, 2003, Perth, Australia
Abstract
In this article photonic implementations of two oversampled analog-to-digital converter architectures are discussed. The first, and simplest design is that of pulse-code-modulation. Simulations and an experiment are developed employing a Multiple-Quantum-Well p-i-n diode comparator. Agreement between simulation and experiment is demonstrated and the design is subsequently extended to a higher performance first order unipolar sigma-delta architecture. Results of the signal-to-noise ratio as a function of input amplitude are presented for an oversampling ratio of 100.
© (2004) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Bradley A. Clare, Kerry A. Corbett, Kenneth J. Grant, Angus Massie, Jesper Munch, and Warren Marwood "Photonic A/Ds employing S-SEED comparators", Proc. SPIE 5277, Photonics: Design, Technology, and Packaging, (25 March 2004); https://doi.org/10.1117/12.523253
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KEYWORDS
Signal to noise ratio

Clocks

Computer architecture

Device simulation

Diodes

Interference (communication)

Switching

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