A low-power VLSI implementation for variable length decoder in MPEG-1 Layer III

Tsung-Han Tsai; Chun-Nan Liu; Wen-Cheng Chen

doi:10.1117/12.532990

19 April 2004 A low-power VLSI implementation for variable length decoder in MPEG-1 Layer III

Tsung-Han Tsai, Chun-Nan Liu, Wen-Cheng Chen

Proceedings Volume 5309, Embedded Processors for Multimedia and Communications; (2004) https://doi.org/10.1117/12.532990
Event: Electronic Imaging 2004, 2004, San Jose, California, United States

Abstract

MPEG Layer III (MP3) audio coding algorithm is a widely used audio coding standard. It involves several complex coding techniques and is therefore difficult to create an efficient architecture design. The variable length decoding (VLD) e.g. Huffman decoding, is an important part of MP3, which needs great amount of search and memory access operations. In this paper a data driven variable length decoding algorithm is presented, which exploits the signal statistics of variable length codes to reduce power and a two-level table lookup method is presented. The decoder was designed based on simplicity and low-cost, low power consumption while retaining the high efficiency requirements. The total power saving is about 67%.

Citation Download Citation

Tsung-Han Tsai, Chun-Nan Liu, and Wen-Cheng Chen "A low-power VLSI implementation for variable length decoder in MPEG-1 Layer III", Proc. SPIE 5309, Embedded Processors for Multimedia and Communications, (19 April 2004); https://doi.org/10.1117/12.532990

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