Multiprocessor Architectures for Automated Inspection Systems

Barry Andrews

doi:10.1117/12.966259

19 December 1985 Multiprocessor Architectures for Automated Inspection Systems

Barry Andrews

Proceedings Volume 0557, Automatic Inspection and Measurement; (1985) https://doi.org/10.1117/12.966259
Event: 29th Annual Technical Symposium, 1985, San Diego, United States

Abstract

This paper describes selected multiprocessor architectures for very high speed automated inspection systems. Traditional image processor architectures, oriented toward sequential processing, lack the throughput potential for use in high-end applications. Therefore, non-Von Neumann multiprocessor architectures are emerging as candidates for future automated inspection systems that constantly challenge the state of the art in image processing. Four processor concepts are compared and contrasted with respect to their applicability in high performance inspection systems. Each has advantages, so the selection of an appropriate architecture should be based primarily on system requirements, such as sensor data rate and format, resolution, image size, and behavior of algorithms.

Citation Download Citation

Barry Andrews "Multiprocessor Architectures for Automated Inspection Systems", Proc. SPIE 0557, Automatic Inspection and Measurement, (19 December 1985); https://doi.org/10.1117/12.966259

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available