10-bit 100-MS/s sample-and-hold amplifier adopting positive feedback technique

Gil-Su Kim; Jae-Tack Yoo; Hoon-Jae Ki; Soo-Won Kim

doi:10.1117/12.608554

30 June 2005 10-bit 100-MS/s sample-and-hold amplifier adopting positive feedback technique

Gil-Su Kim, Jae-Tack Yoo, Hoon-Jae Ki, Soo-Won Kim

Proceedings Volume 5837, VLSI Circuits and Systems II; (2005) https://doi.org/10.1117/12.608554
Event: Microtechnologies for the New Millennium 2005, 2005, Sevilla, Spain

Abstract

Since a switched-capacitor sample-and-hold amplifier (SHA) has a feedback loop outside its op-amp, an op-amp with positive feedback technique (PFT) can be adopted to enhance the DC-gain of the op-amp. This paper proposes a positive feedback amplifier with dramatically increased DC-gain of 127-dB and reports that a SHA adopting proposed amplifier is stable by feedback operation. Measurement results demonstrated stable operation with spurious free dynamic range (SFDR) of 70-dB.

Citation Download Citation

Gil-Su Kim, Jae-Tack Yoo, Hoon-Jae Ki, and Soo-Won Kim "10-bit 100-MS/s sample-and-hold amplifier adopting positive feedback technique", Proc. SPIE 5837, VLSI Circuits and Systems II, (30 June 2005); https://doi.org/10.1117/12.608554

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available