Litho-metrology challenges for the 45-nm technology node and beyond

John A. Allgair; Benjamin D. Bunday; Mike Bishop; Pete Lipscomb; Ndubuisi G. Orji

doi:10.1117/12.659059

24 March 2006 Litho-metrology challenges for the 45-nm technology node and beyond

John A. Allgair, Benjamin D. Bunday, Mike Bishop, Pete Lipscomb, Ndubuisi G. Orji

Proceedings Volume 6152, Metrology, Inspection, and Process Control for Microlithography XX; 61520C (2006) https://doi.org/10.1117/12.659059
Event: SPIE 31st International Symposium on Advanced Lithography, 2006, San Jose, California, United States

Abstract

There are numerous metrology challenges facing photolithography for the 45 nm technology node and beyond in the areas of critical dimension (CD), overlay and defect metrology. Many of these challenges are identified in the 2005 International Technology Roadmap for Semiconductors (ITRS) [1]. The Lithography and Metrology sections of the ITRS call for measurement of 45/32/22/18 nm generation linewidth and overlay. Each subsequent technology generation requires less variation in CD linewidth and overlay control, which results in a continuing need for improved metrology precision. In addition, there is an increasing need to understand individual edge variation and edge placement errors relative to the intended design. This is accelerating the need for new methods of CD and overlay measurement, as well as new target structures. This paper will provide a comprehensive overview of the CD and overlay metrology challenges for photolithography, taking into account the areas addressed in the 2005 ITRS for the 45 nm technology generation and beyond.

Citation Download Citation

John A. Allgair, Benjamin D. Bunday, Mike Bishop, Pete Lipscomb, and Ndubuisi G. Orji "Litho-metrology challenges for the 45-nm technology node and beyond", Proc. SPIE 6152, Metrology, Inspection, and Process Control for Microlithography XX, 61520C (24 March 2006); https://doi.org/10.1117/12.659059

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