Paper
15 March 2006 Robust double exposure flow for memory
Author Affiliations +
Abstract
Rapidly decreasing critical dimension is demanding new RET technologies like PSMgate, customized strong off-axis, and Double Exposure. Among them, Double Exposure is becoming a stronger candidate as throughput issue is getting better because of exposure tool's enhancement. Indeed, immersion is not fully ready and many semiconductor manufacturing companies want to extend their exposure tools for sub 55nm process. So, Double Exposure has been studied for a long time and suggested by many lithographers for sub 55nm process. For Logic device, it has many challenges to make Double Exposure work like need for model based layer decomposition. But for Memory device such as DRAM and FLASH, there is a good way to make Double Exposure flow robust because its design is not that random like Logic Device. In this paper, we will investigate and show how to implement robotic Double Exposure using two typical Double Exposure illumination combinations, Dipole-Ann and Double Dipole.
© (2006) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
J. W. Park, Sungsoo Shu, Insung Kim, and Youngsuk Kang "Robust double exposure flow for memory", Proc. SPIE 6154, Optical Microlithography XIX, 61542E (15 March 2006); https://doi.org/10.1117/12.655026
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CITATIONS
Cited by 2 scholarly publications and 5 patents.
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KEYWORDS
Photomasks

Semiconducting wafers

Optical proximity correction

Electroluminescence

Logic devices

Tolerancing

Instrument modeling

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