Empirical OPC rule inference for rapid RET application

Anand P. Kulkarni

doi:10.1117/12.686593

20 October 2006 Empirical OPC rule inference for rapid RET application

Anand P. Kulkarni

Proceedings Volume 6349, Photomask Technology 2006; 634926 (2006) https://doi.org/10.1117/12.686593
Event: SPIE Photomask Technology, 2006, Monterey, California, United States

Abstract

A given technological node (45 nm, 65 nm) can be expected to process thousands of individual designs. Iterative methods applied at the node consume valuable days in determining proper placement of OPC features, and manufacturing and testing mask correspondence to wafer patterns in a trial-and-error fashion for each design. Repeating this fabrication process for each individual design is a time-consuming and expensive process. We present a novel technique which sidesteps the requirement to iterate through the model-based OPC analysis and pattern verification cycle on subsequent designs at the same node. Our approach relies on the inference of rules from a correct pattern at the wafer surface it relates to the OPC and pre-OPC pattern layout files. We begin with an offline phase where we obtain a "gold standard" design file that has been fab-tested at the node with a prepared, post-OPC layout file that corresponds to the intended on-wafer pattern. We then run an offline analysis to infer rules to be used in this method. During the analysis, our method implicitly identifies contextual OPC strategies for optimal placement of RET features on any design at that node. Using these strategies, we can apply OPC to subsequent designs at the same node with accuracy comparable to the original design file but significantly smaller expected runtimes. The technique promises to offer a rapid and accurate complement to existing RET application strategies.

Citation Download Citation

Anand P. Kulkarni "Empirical OPC rule inference for rapid RET application", Proc. SPIE 6349, Photomask Technology 2006, 634926 (20 October 2006); https://doi.org/10.1117/12.686593

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