The haze nucleation and growth phenomenon on critical photomask surfaces has periodically gained attention as it has
significantly impacted wafer printability for different technology nodes over the years. A number of process solutions
have been promoted in the semiconductor industry which has been shown to suppress or minimize the propensity for
haze formation, but none of these technologies can stop every instance of haze. Fortunately, a novel technology which
uses a dry (no chemical effluents) removal system, laser-based, through pellicle process has been reported recently. The
technology presented here avoids many of the shortcomings of the wet clean process mentioned previously. The dry
clean process extends the life of the photomask; maintains more consistent CD’s, phase, and transmission; avoids
adjustment to the exposure dose to account for photomask changes, reduces the number of required inspections and
otherwise improves the efficiency and predictability of the lithography cell.
We report on the performance of photomask based on a design developed to study the impact of metrology variations on
dry clean process. In a first step we focus on basic characteristics: CD variation, phase, Cr/MoSi transmission, pellicle
transmission, registration variations. In a second step, we evaluate haze removal and prevention performance and wafer
photo margin. Haze removal is studied on the masks for several haze types and various exposure conditions. The results
of this study show that some of metrology variation are likely to be a problem at high technology node, and haze removal
performance is determined whether the component of haze is remained or not after treatment.
As technical advances continue, the pattern size of semiconductor circuit has been shrunk. So the field of the photomask needs the processing more strictly. It is critical to the photomask which contained considerably shrank circuit and ultra high density pattern for sub-20 nm tech device, although a small defect is negligible in the conventional process. Even if some defect can be repaired, it is not satisfied with a strict pattern specification. Stricter fabrication process and pattern specification increase the manufacture cost. Furthermore, EUV photomask manufacture cost is several times expensive than the conventional photomask. Therefore the effort to decrease defects is important for the photomask fabrication process. In addition, when defects are generated, it is obviously important that the repaired patterns have better pattern reliability. In this paper, we studied about advanced processes that control and remove hard defects minutely .on ArF attenuated phase-shift mask. This study was accomplished for 4 areas. First of all, we developed advanced Mosi etch process. Defects are generated under this etch process are not fatal. The thickness of hard defects were controlled thinner under this etch process compared with conventional etch process. Secondly, we studied cleaning process that has good performance on Cr : MoSi surface and a poor hydrophilic contrast to control side effect by etch process. Thirdly, we made inspection technique for detecting thin thickness hard defects. Lastly, we researched a repair technology that is effective in hard defects of thin thickness. The performance of the repaired pattern was verified by AIMS. In this study, it is researched that control shape, properties of defects to prepare a reliable repair and improved repaired photomask pattern reliability by 30% over.
Advanced photomasks exploit complex patterns that show little resemblance to the target printed wafer
pattern. The main mask pattern is modified by various OPC and SRAF features while further complexity is
introduced as source-mask-optimization (SMO) technologies experience early adoption at leading
manufacturers. The small size and irregularity of these features challenge the mask inspection process as well
as the mask manufacturing process.
The two major concerns for mask inspection and qualification efficacy of advanced masks are defect
detection and photomask inspectability. Enhanced defect detection is critical for the overall mask
manufacturing process qualification which entails characterization of the systematic deviations of the pattern.
High resolution optical conditions are the optimal solution for manufacturing process qualification as well as
a source of additional information for the mask qualification. Mask inspection using high resolution
conditions operates on an optical image that differs from the aerial image. The high resolution image closely
represents the mask plane pattern. Aerial imaging mode inspection conditions, where the optics of the
inspection tool emulates the lithography manufacturing conditions in a scanner, are the most compatible
imaging solution for photomask pattern development and hence mask inspectability. This is an optimal
environment for performing mask printability characterization and qualification.
In this paper we will compare the roles of aerial imaging and high resolution mask inspection in the mask
house.
Sensitivity of newly developed photo mask inspection tool with reflective optic was evaluated for 45nm DRAM device.
To get the required defect sensitivity of mask, printability of mask defect on wafer were simulated using in house
simulation tool. Simulation results were compared with inspection results. Characteristic and sensitivity comparison
between conventional transmissive and reflective optic tools were evaluated for several types of mask layer of 45nm and
55nm DRAM according to pixel size of detector of inspection tools. This reflective optic with short working distance
was equivalent in sensitivity to transmissive optic tool. Mask for 45nm DRAM can be qualified by current status of the
art inspection tools.
As the photomask design rules continue to shrink towards 45nm and below, the defect classification criteria is
becoming more challenging to be set accurately. Pattern fidelity issues and masks defects that were once considered
insignificant or merely nuisances are now yield-limiting. On the other hand, there are still cases of small defects
captured during reticle inspection but will not print on the wafer. In addition, in a production setting environment it is
critical to ascertain quickly and efficiently the true lithographic effect of reticle defects in order to avoid yield and cycle
time impacts.
As a starting point, it is best to inspect the reticle at the highest sensitivity to find all defects and anomalies. From there,
fast and efficient means to sort and prioritize defects are necessary for inspection operators' and engineers' convenience.
Then, it is critical to model all the defects accurately for their lithographic impact. Finally, an accurate lithography-based
set of reticle defect disposition criteria can be developed for the manufacturing process flow.
The focus of this study is on contact or hole patterns since the issues regarding capture of defects on such patterns are
typically more complex than the ones on line and space patterns. The intent is to assess and devise defect disposition
criteria for contact hole layers utilizing KLA-Tencor's 5X6 DUV inspection system with both standard die-to-die and
Litho2 algorithms and the Automated Mask Defect Disposition (AMDD) system. AMDD lithographic printability
results will be compared to AIMS results and printed results on wafer.
As the design rule continues to shrink towards 65nm and beyond, the defect criteria is becoming ever more challenging.
The pattern fidelity and reticle defects that were once considered as insignificant or nuisance are now migrating to
yield-limiting. As a result, it is important to conduct After Develop Inspection (ADI) to identify where in the process the
small contamination and particles originate from. The intent of this study is to identify the defect source by utilizing
KLA-Tencor's SLF die-to-die reflected light mode and ADI algorithm for the post development resist layer inspection.
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