Dr. Dongchul Ihm Profile

Dr. Dongchul Ihm

Principal Engineer at Samsung Electronics Co Ltd

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Author

Publications (10)

Proceedings Article | 10 April 2024 Presentation + Paper

Unique spectral interferometry solutions for complex high aspect ratio 3D NAND structures

Jaesuk Yoon, Jongmin Park, Minjung Shin, Dongchul Ihm, Oshrat Bismuth, Smadar Ferber, Jacob Ofek, Igor Turovets, Isaac Kim

Proceedings Volume 12955, 129551S (2024) https://doi.org/10.1117/12.3010729

KEYWORDS: Semiconducting wafers, 3D metrology, Silicon, Chemical mechanical planarization, Interferometry, Modeling, Scatterometry, Metrology

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Proceedings Article | 27 April 2023 Presentation + Paper

Deep learning-based automatic defect classification for semiconductor manufacturing

Eunpa Kim, Myungchul Shin, Hee-Jun Ahn, Soyoon Park, Dong-ryul Lee, Haesung Park, Minjung Shin, Dongchul Ihm

Proceedings Volume 12496, 124961H (2023) https://doi.org/10.1117/12.2658638

KEYWORDS: Semiconductor manufacturing, Inspection, Image classification, Scanning electron microscopy, Deep learning, Semiconductors, Classification systems

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Proceedings Article | 2 April 2014 Paper

Highly effective and accurate weak point monitoring method for advanced design rule (1x nm) devices

Jeongho Ahn, ShiJin Seong, Minjung Yoon, Il-Suk Park, HyungSeop Kim, Dongchul Ihm, Soobok Chin, Gangadharan Sivaraman, Mingwei Li, Raghav Babulnath, Chang Ho Lee, Satya Kurada, Christine Brown, Rajiv Galani, JaeHyun Kim

Proceedings Volume 9050, 905018 (2014) https://doi.org/10.1117/12.2046651

KEYWORDS: Inspection, Semiconducting wafers, Manufacturing, Modulation, Lithography, Electronic design automation, Semiconductors, Optical inspection, Wafer inspection, Design for manufacturability

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Historically when we used to manufacture semiconductor devices for 45 nm or above design rules, IC manufacturing yield was mainly determined by global random variations and therefore the chip manufacturers / manufacturing team were mainly responsible for yield improvement. With the introduction of sub-45 nm semiconductor technologies, yield started to be dominated by systematic variations, primarily centered on resolution problems, copper/low-k interconnects and CMP. These local systematic variations, which have become decisively greater than global random variations, are design-dependent [1, 2] and therefore designers now share the responsibility of increasing yield with manufacturers / manufacturing teams. A widening manufacturing gap has led to a dramatic increase in design rules that are either too restrictive or do not guarantee a litho/etch hotspot-free design. The semiconductor industry is currently limited to 193 nm scanners and no relief is expected from the equipment side to prevent / eliminate these systematic hotspots. Hence we have seen a lot of design houses coming up with innovative design products to check hotspots based on model based lithography checks to validate design manufacturability, which will also account for complex two-dimensional effects that stem from aggressive scaling of 193 nm lithography. Most of these hotspots (a.k.a., weak points) are especially seen on Back End of the Line (BEOL) process levels like Mx ADI, Mx Etch and Mx CMP. Inspecting some of these BEOL levels can be extremely challenging as there are lots of wafer noises or nuisances that can hinder an inspector’s ability to detect and monitor the defects or weak points of interest. In this work we have attempted to accurately inspect the weak points using a novel broadband plasma optical inspection approach that enhances defect signal from patterns of interest (POI) and precisely suppresses surrounding wafer noises. This new approach is a paradigm shift in wafer inspection by leveraging systematic defect locations for high sensitivity inspection, thereby enhancing the discovery and monitoring of yield-limiting defects at traditional optical inspection throughput.

Proceedings Article | 10 April 2013 Paper

Optical analysis on the wafer defect inspection for yield enhancement

Jeongho Ahn, Byoungho Lee, Dong-Ryul Lee, Shijin Seong, Hyungseop Kim, Seongchae Choi, Heewon Sunwoo, Junbum Lee, Dongchul Ihm, Soobok Chin, Ho-Kyu Kang

Proceedings Volume 8681, 86811E (2013) https://doi.org/10.1117/12.2011387

KEYWORDS: Inspection, Finite-difference time-domain method, Semiconducting wafers, Defect inspection, Reflectivity, Numerical analysis, Wafer inspection, Thin films, Polarization, Multilayers

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Proceedings Article | 5 April 2012 Paper

Accelerating litho technology development for advanced design node flash memory FEOL by next-generation wafer inspection and SEM review platforms

Byoung Ho Lee, Jeongho Ahn, Dongchul Ihm, Soobok Chin, Dong-Ryul Lee, Seongchae Choi, Junbum Lee, Ho-Kyu Kang, Gangadharan Sivaraman, Tetsuya Yamamoto, Rahul Lakhawat, Ravikumar Sanapala, Chang Ho Lee, Arun Lobo

Proceedings Volume 8324, 832429 (2012) https://doi.org/10.1117/12.916505

KEYWORDS: Inspection, Scanning electron microscopy, Semiconducting wafers, Bridges, Front end of line, Defect detection, Wafer inspection, Defect inspection, Optical inspection, Particles

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Proceedings Article | 3 April 2012 Paper

Defect distribution study at through silicon via (TSV) bottom by scanning white-light interference microscopy

Jeongho Ahn, Jaeyoung Park, Dongchul Ihm, Byoungho Lee, Soobok Chin, Ho-Kyu Kang, Jiyoung Noh, Peter Ko, Timothy Johnson, Namki Suk

Proceedings Volume 8324, 83241U (2012) https://doi.org/10.1117/12.917797

KEYWORDS: Semiconducting wafers, Critical dimension metrology, Microscopy, Silicon, Inspection, High volume manufacturing, Phase measurement, Electronics, Metrology, Process control

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Proceedings Article | 24 March 2009 Paper

Applications of AFM in semiconductor R&D and manufacturing at 45 nm technology node and beyond

Moon-Keun Lee, Minjung Shin, Tianming Bao, Chul-Gi Song, Dean Dawson, Dong-Chul Ihm, Vladimir Ukraintsev

Proceedings Volume 7272, 72722R (2009) https://doi.org/10.1117/12.813389

KEYWORDS: Metrology, Atomic force microscopy, Critical dimension metrology, Silicon, Transmission electron microscopy, Transistors, Photomasks, Process control, Image processing, Optical filters

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Proceedings Article | 25 March 2008 Paper

Effect of setpoint on CD measurement in CD-AFM: plausibility study

B. C. Park, J. Choi, S. J. Ahn, M-j Shin, D-c Ihm, B-h Lee

Proceedings Volume 6922, 69222H (2008) https://doi.org/10.1117/12.773230

KEYWORDS: Calibration, Metrology, Critical dimension metrology, Liquids, Atomic force microscopy, Feedback loops, Near field scanning optical microscopy, Humidity, Error analysis, Solids

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Proceedings Article | 10 May 2005 Paper

Experimental study of contact edge roughness on sub-100 nm various circular shapes

Tae Lee, Dongchul Ihm, Hyo Kang, Jum Lee, Byoung Lee, Soo Chin, Do Cho, Chang Song

Proceedings Volume 5752, (2005) https://doi.org/10.1117/12.597948

KEYWORDS: Semiconducting wafers, Edge roughness, Critical dimension metrology, Line edge roughness, Distortion, Line width roughness, Metrology, Semiconductors, Image analysis, Image filtering

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Proceedings Article | 24 May 2004 Paper

Experimental methodology of contact edge roughness on sub-100-nm pattern

Tae Yong Lee, Dongchul Ihm, Hyo Chun Kang, Jun Bum Lee, Byoung-Ho Lee, Soo-Bok Chin, Do-Hyun Cho, Yang Hyong Kim, Ho Dong Yang, Kyoung Mo Yang

Proceedings Volume 5375, (2004) https://doi.org/10.1117/12.534496

KEYWORDS: Semiconducting wafers, Edge roughness, Line width roughness, Line edge roughness, Semiconductors, Critical dimension metrology, Distortion, Metrology, Optical lithography, Holmium

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Showing 5 of 10 publications

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