The current method for the extraction of olive oil consists on the use of a decanter to split it by centrifugation. During this process, different olive oil samples are analyzed in a chemical laboratory in order to determine moisture levels in the oil, which is a decisive factor in olive oil quality. However, these analyses are usually both costly and slow. The developed prototype is the foundation of an instrument for real-time monitoring of moisture in olive oil. Using the olive oil as the dielectric of a parallel-plate capacitor, a model to relate the moisture in olive oil and capacitance has been created. One of the challenges for this application is the moisture range, which is usually between 1 and 2%, thus requiring the detection of pF-order variations in capacitance. This capacitance also depends on plate size and the distance between plates. The presented prototype, which is based on a PSoC (Programmable System-on-Chip), includes a reconfigurable digital and analog subsystem, which makes the determination of moisture independent of the capacitor. Finally, the measure is also sent to a smartphone via Bluetooth.
KEYWORDS: Magnetic resonance imaging, Breast, Tumors, Drug discovery, Feature extraction, Image segmentation, Computer aided diagnosis and therapy, Imaging systems, Independent component analysis, Breast cancer
Diagnostically challenging breast tumors and Non-Mass-Enhancing (NME) lesions are often characterized by spatial and temporal heterogeneity, thus difficult to detect and classify. Differently from mass enhancing tumors they have an atypical temporal enhancement behavior that does not enable a straight-forward lesion classification into benign or malignant. The poorly defined margins do not support a concise shape description thus impacting morphological characterizations. A multi-level analysis strategy capturing the features of Non-Mass- Like-Enhancing (NMLEs) is shown to be superior to other methods relying only on morphological and kinetic information. In addition to this, the NMLE features such as NMLE distribution types and NMLE enhancement pattern, can be employed in radomics analysis to make robust models in the early prediction of the response to neo-adjuvant chemotherapy in breast cancer. Therefore, this could predict treatment response early in therapy to identify women who do not benefit from cytotoxic therapy.
This article presents a prototype of a wearable instrument for oxygen saturation and ECG monitoring. The proposed measuring system is based on the variability of the light reflection of a LED emission placed on the subject’s temple. Besides, the system has the capacity to incorporate electrodes to obtain ECG measurements. The activity of the user can be monitored through an accelerometer. All measurements are stored and transmitted to a mobile device (tablet or smartphone) through a Bluetooth link where the information is treated and shown to the user.
Graph network models in dementia have become an important computational technique in neuroscience to study fundamental organizational principles of brain structure and function of neurodegenerative diseases such as dementia. The graph connectivity is reflected in the connectome, the complete set of structural and functional connections of the graph network, which is mostly based on simple Pearson correlation links.
In contrast to simple Pearson correlation networks, the partial correlations (PC) only identify direct correlations while indirect associations are eliminated. In addition to this, the state-of-the-art techniques in brain research are based on static graph theory, which is unable to capture the dynamic behavior of the brain connectivity, as it alters with disease evolution. We propose a new research avenue in neuroimaging connectomics based on combining dynamic graph network theory and modeling strategies at different time scales. We present the theoretical framework for area aggregation and time-scale modeling in brain networks as they pertain to disease evolution in dementia. This novel paradigm is extremely powerful, since we can derive both static parameters pertaining to node and area parameters, as well as dynamic parameters, such as system’s eigenvalues. By implementing and analyzing dynamically both disease driven PC-networks and regular concentration networks, we reveal differences in the structure of these network that play an important role in the temporal evolution of this disease. The described research is key to advance biomedical research on novel disease prediction trajectories and dementia therapies.
KEYWORDS: Oxygen, Prototyping, Electrocardiography, Photoplethysmography, Light emitting diodes, Blood, Mobile devices, Sensors, Information fusion, Signal processing, Biomedical optics, Analog electronics, System on a chip, Heart, Measurement devices, Oximetry, Microelectromechanical systems
This article presents a preliminary prototype of a wearable instrument for oxygen saturation and ECG monitoring. The proposed measuring system is based on the light reflection variability of a LED emission on the subject temple. Besides, the system has the capacity to incorporate electrodes to obtain ECG measurements. All measurements are stored and transmitted to a mobile device (tablet or smartphone) through a Bluetooth link.
An important problem in modern therapeutics at the proteomic level remains to identify therapeutic targets in a plentitude of high-throughput data from experiments relevant to a variety of diseases. This paper presents the application of novel modern control concepts, such as pinning controllability and observability applied to the glioma cancer stem cells (GSCs) protein graph network with known and novel association to glioblastoma (GBM). The theoretical frameworks provides us with the minimal number of "driver nodes", which are necessary, and their location to determine the full control over the obtained graph network in order to provide a change in the network’s dynamics from an initial state (disease) to a desired state (non-disease). The achieved results will provide biochemists with techniques to identify more metabolic regions and biological pathways for complex diseases, to design and test novel therapeutic solutions.
KEYWORDS: Intellectual property, Reverse engineering, Digital watermarking, Transform theory, Embedded systems, Opacity, Java, Field programmable gate arrays, Integrated circuit design, System on a chip
One of the big challenges in the design of embedded systems today is how to combine design reuse and intellectual
property protection (IPP). Strong IP schemes such as hardware dongle or layout watermarking usually have a very
limited design reuse for different FPGA/ASIC design platforms. Some techniques also do not fit well with protection of
software in embedded microprocessors. Another approach to IPP that allows an easy design reuse and has low costs but
a somehow reduced security is code "obfuscation." Obfuscation is a method to hide the design concept, or program
algorithm included in the C or HDL source by using one or more transformations of the original code. Obfuscation
methods include, for instance, renaming identifiers, removing comments or formatting of the code. More sophisticated
obfuscation methods include data splitting or merging, and control flow changes. This paper shows strength and
weakness of method obfuscating C, VHDL and Verilog code.
KEYWORDS: Electrocardiography, Wavelets, Field programmable gate arrays, Signal processing, LabVIEW, Analog electronics, Interference (communication), Filtering (signal processing), Digital signal processing, Signal detection
This paper presents the use of wavelet cores for a full reconfigurable electrocardiogram signal (ECG) acquisition
system. The system is compound by two reconfigurable devices, a FPGA and a FPAA. The FPAA is in charge of the
ECG signal acquisition, since this device is a versatile and reconfigurable analog front-end for biosignals. The FPGA is
in charge of FPAA configuration, digital signal processing and information extraction such as heart beat rate and others.
Wavelet analysis has become a powerful tool for ECG signal processing since it perfectly fits ECG signal shape. The use
of these cores has been integrated in the LabVIEW FPGA module development tool that makes possible to employ
VHDL cores within the usual LabVIEW graphical programming environment, thus freeing the designer from tedious and
time consuming design of communication interfaces. This enables rapid test and graphical representation of results.
Reuse-based design has emerged as one of the most important methodologies for integrated circuit design, with reusable
Intellectual Property (IP) cores enabling the optimization of company resources due to reduced development time and
costs. This is of special interest in the Field-Programmable Logic (FPL) domain, which mainly relies on automatic
synthesis tools. However, this design methodology has brought to light the intellectual property protection (IPP) of those
modules, with most forms of protection in the EDA industry being difficult to translate to this domain. However, IP core
watermarking has emerged as a tool for IP core protection. Although watermarks may be inserted at different levels of
the design flow, watermarking Hardware Description Language (HDL) descriptions has been proved to be a robust and
secure option. In this paper, a new framework for the protection of μP cores is presented. The protection scheme is
derived from the IPP@HDL procedure and it has been adapted to the singularities of μP cores, overcoming the problems
for the digital signature extraction in such systems. Additionally, the feature of hardware activation has been introduced,
allowing the distribution of μP cores in a "demo" mode and a later activation that can be easily performed by the
customer executing a simple program. Application examples show that the additional hardware introduced for protection
and/or activation has no effect over the performance, and showing an assumable area increase.
The quadratic sieve (QS) algorithm is one of the most powerful algorithms to factor large composite primes used to
break RSA cryptographic systems. The hardware structure of the QS algorithm seems to be a good fit for FPGA
acceleration. Our new ε-QS algorithm further simplifies the hardware architecture making it an even better candidate for
C2H acceleration. This paper shows our design results in FPGA resource and performance when implementing very long
arithmetic on the Nios microprocessor platform with C2H acceleration for different libraries (GMP, LIP, FLINT, NRMP)
and QS architecture choices for factoring 32-2048 bit RSA numbers.
Significant improvements have been achieved for Intellectual Property Protection (IPP) of IP cores at HDL level by means of our proposed watermarking techniques from the initial solution. The basic idea relies on spreading the bits of a digital signature at the HDL design level using combinational logic or look-up structures included within the original system. The techniques also include a secure and non-destructive signature extraction process. Recently, applicability has been extended due to the development of an automated tool for signature spreading purposes. Last advances refer to the development of new algorithms for the automated tool that result in important improvements and automatic generation of the VHDL code to add to the original core for signature extraction purposes. In addition, the most important metrics for watermarking techniques, such as the impact over the original core and the strength against attacks, allow the evaluation of the watermarking technique and illustrate the effectiveness of the proposal.
This paper presents significant improvements to our previous watermarking technique for Intellectual Property
Protection (IPP) of IP cores. The technique relies on hosting the bits of a digital signature at the HDL design level using
resources included within the original system. Thus, any attack trying to change or remove the digital signature will
damage the design. The technique also includes a procedure for secure signature extraction requiring minimal
modifications to the system. The new advances refer to increasing the applicability of this watermarking technique to any
design, not only to those including look-ups, and the provision of an automatic tool for signature hosting purposes.
Synthesis results show that the application of the proposed watermarking strategy results in negligible degradation of
system performance and very low area penalties and that the use of the automated tool, in addition to easy the signature
hosting, leads to reduced area penalties.
In this paper a watermarking technique for Intellectual Property Protection (IPP) of FPGA-based systems is
proposed. The aim is to protect the author rights of reusable IP cores by means of a digital signature that uniquely
identifies both the original design and the design recipient. The proposed watermarking technique relies on a
procedure that spreads the digital signature in cells of memory structures at Hardware Description Language (HDL)
design level, not increasing the area of the system. This signature is preserved through synthesis, placement and
routing processes. The technique includes a procedure for signature extraction requiring minimal modifications to
the system. Thus, it is possible to detect the ownership rights without interfering the normal operation of the system
and providing high invulnerability. To illustrate the properties of the proposed watermarking technique, both
protected and unprotected design examples are compared in terms of area and performance. The analysis of the
results shows that the area increase is very low while throughput penalization is almost negligible.
Orthogonal Frequency division multiplexing (OFDM) spread spectrum
technique, sometimes also called multi-carrier or discrete
multi-tone modulation, are used in bandwidth-efficient communication
systems in the presence of channel distortion. The benefits of OFDM
are high spectral efficiency, resiliency to RF interference, and
lower multi-path distortion. OFDM is the basis for the European
digital audio broadcasting (DAB) standard, the global asymmetric
digital subscriber line (ADSL) standard, in the IEEE 802.11 5.8 GHz
band standard, and ongoing development in wireless local area networks. The modulator and demodulator in an OFDM system can be
implemented by use of a parallel bank of filters based
on the discrete Fourier transform (DFT), in case the
number of subchannels is large (e.g. K > 25), the OFDM
system are efficiently implemented by use of the fast
Fourier transform (FFT) to compute the DFT. We have
developed a custom FPGA-based Altera NIOS system to
increase the performance, programmability, and low power
in mobil wireless systems.
The overall gain observed for a 1024-point FFT ranges depending on the multiplier used
by the NIOS processor between a factor of 3 and 16. A careful optimization described in the appendix
yield a performance gain of up to 77% when compared with
our preliminary results.
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