Prof. Iris Hui-Ru Jiang Profile

Prof. Iris Hui-Ru Jiang

at National Taiwan University

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Publications (2)

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Proceedings Article | 26 May 2022 Presentation + Paper

Novel methodology for SRAF placement over a machine learning generated probability map

Yi-Ting Lin, Sean Shang-En Tseng, Iris Hui-Ru Jiang, James Shiely

Proceedings Volume 12052, 120520X (2022) https://doi.org/10.1117/12.2613681

KEYWORDS: SRAF, Photovoltaics, Machine learning, Lithography, Source mask optimization, Optical proximity correction

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Subresolution assist feature (SRAF) insertion is an effective way to improve the printability and lithographic process window of isolated and semi-isolated features. State-of-the-art works resort to machine learning to reduce the computational cost associated with model-based methods. However, the result of SRAF probability learning, a probability map, cannot be directly treated as SRAFs. Inserting an SRAF to each layout grid predicted as 1 leads to design rule violations. Therefore, the SRAF probability learning model can only guide SRAF insertion and needs special handling to place SRAFs. For SRAF placement, we observe that placing SRAFs at probability maxima might be too greedy so that the SRAF prediction is masked to a certain extent. Therefore, we propose a novel methodology for SRAF placement over a machine learning generated probability map. First, a clustering-based method generates an initial SRAF inserted layout based on the given probability map. Then, a two-stage SRAF legalization strategy modifies the positions of SRAFs to be compliant with design rules. Experimental results show that given a probability map, our methodology can generate an SRAF inserted layout which guarantees design rule violation freeness while maintaining competitive PV band and EPE.

Proceedings Article | 20 March 2019 Presentation + Paper

Efficient search of layout hotspot patterns for matching SEM images using multilevel pixelation

Sean Shang-En Tseng, Wei-Chun Chang, Iris Hui-Ru Jiang, Jun Zhu, James Shiely

Proceedings Volume 10961, 109610B (2019) https://doi.org/10.1117/12.2514818

KEYWORDS: Scanning electron microscopy, Image processing, Lithography, Silicon, Semiconducting wafers

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Layout features become highly susceptible to lithography process fluctuations due to the widening subwavelength lithography gap. Problematic layout patterns incur poor printability even if they pass design rule checking. These hotspots should be detected and removed at early design phases to improve manufacturability. While existing studies mainly focus on hotspot detection and pattern classification, hotspot pattern library generation is rarely addressed in literature but crucial to the effectiveness and efficiency of hotspot detection. For an advanced process, in addition to yield-limiting patterns inherent from old processes and computation intensive lithography simulation, defect silicon images (SEM images) inspected from test wafers provide more realistic process-dependent hotspots. For facilitating hotspot pattern library generation, we raise a pattern matching problem of searching design layout patterns that may induce problematic SEM images. The key challenge is the various shape distortions between an SEM image and corresponding design layouts. Directly matching either feature points or shapes of both is thus not applicable. We observe that even with shape distortions, matched design layouts and the SEM image have similar density distribution. Therefore, in this paper, we propose an efficient multilevel pixilation framework to seek layout clips with similar density distribution from coarse- to finegranularities to an SEM image. The proposed framework possesses high parallelism. Our results show that the proposed method can effectively and efficiently identify matched layout pattern candidates.

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