Dr. Joerg Thiele
SPIE Involvement:
Author
Publications (23)

Proceedings Article | 20 March 2006 Paper
Ralph Schlief, Mario Hennig, Rainer Pforr, Jörg Thiele, Max Hoepfl
Proceedings Volume 6154, 61543F (2006) https://doi.org/10.1117/12.656621
KEYWORDS: Optical proximity correction, Polarization, Data modeling, Scanners, SRAF, Photomasks, Semiconducting wafers, Process modeling, Printing, Scanning electron microscopy

Proceedings Article | 14 March 2006 Paper
Thomas Roessler, Wolfgang Grimm, Jörg Thiele
Proceedings Volume 6156, 615607 (2006) https://doi.org/10.1117/12.652682
KEYWORDS: Optical proximity correction, Electronic design automation, Design for manufacturing, Product engineering, Standards development, Device simulation, Semiconductors, Design for manufacturability, Manufacturing, Data modeling

Proceedings Article | 13 March 2006 Paper
Proceedings Volume 6156, 615605 (2006) https://doi.org/10.1117/12.656428
KEYWORDS: Optical proximity correction, Critical dimension metrology, Manufacturing, SRAF, Capacitance, Resolution enhancement technologies, Semiconducting wafers, Photomasks, Data processing, Design for manufacturability

Proceedings Article | 5 November 2005 Paper
Christof Bodendorf, Jens Haßmann, Thomas Mülders, Karin Kurth, Jörg Thiele
Proceedings Volume 5992, 599224 (2005) https://doi.org/10.1117/12.632159
KEYWORDS: Optical proximity correction, Silicon, Data modeling, Diffusion, Process modeling, Photomasks, Semiconducting wafers, Lithographic illumination, Anisotropy, Distortion

Proceedings Article | 28 June 2005 Paper
Martin Keck, Christof Bodendorf, Jorg Thiele, Alberto Gomez, Ying-Chung Tseng, Teng-Yen Huang
Proceedings Volume 5853, (2005) https://doi.org/10.1117/12.617215
KEYWORDS: Optical proximity correction, Photomasks, Data modeling, Semiconducting wafers, Lithography, Printing, Scanning electron microscopy, Critical dimension metrology, Manufacturing, Phase shifts

Showing 5 of 23 publications
Proceedings Volume Editor (1)

Conference Committee Involvement (5)
Design for Manufacturability through Design-Process Integration IV
24 February 2010 | San Jose, California, United States
Design for Manufacturability through Design-Process Integration III
26 February 2009 | San Jose, California, United States
Design for Manufacturability through Design-Process Integration II
28 February 2008 | San Jose, California, United States
Design for Manufacturability through Design-Process Integration
1 March 2007 | San Jose, California, United States
Design and Process Integration for Microelectronic Manufacturing IV
23 February 2006 | San Jose, California, United States
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