Integration of perovskite oxides with silicon and germanium can enable the realization of novel electronics device designs and the improvement of device performance. In particular, the wide variety of perovskite oxides and their ability to grow epitaxially on silicon and germanium allows the design of monolithically integrated semiconductor devices. The fabrication of monolithically integrated metal-ferroelectric-semiconductor structures is reported. Out-of-plane orientation of BaTiO3 ferroelectric film is demonstrated, and process considerations to ensure oxide electrode conductivity are discussed. The structures reported here demonstrate the feasibility of fabricating ferroelectric field effect devices that are monolithically integrated into silicon and/or germanium platforms.
A fast and inexpensive scheme for etch rate prediction using flexible continuum models and Bayesian statistics is demonstrated. Bulk etch rates of MgO are predicted using a steady-state model with volume-averaged plasma parameters and classical Langmuir surface kinetics. Plasma particle and surface kinetics are modeled within a global plasma framework using single component Metropolis Hastings methods and limited data. The accuracy of these predictions is evaluated with synthetic and experimental etch rate data for magnesium oxide in an ICP-RIE system. This approach is compared and superior to factorial models generated from JMP, a software package frequently employed for recipe creation and optimization.
Crystalline lanthanum aluminate (LAO) films were grown epitaxially on SrTiO3(001) and on Si(001) with a buffer layer of four unit cells of SrTiO3 by atomic layer deposition. The SrTiO3 buffer layer was grown by molecular beam epitaxy. Tris(N,N’-diisopropylformamidinate)-lanthanum, trimethylaluminum, and water as co-reactants were employed at 250 °C for atomic layer deposition. Films were characterized using ex-situ reflection high-energy electron diffraction, X-ray diffraction and in-situ X-ray photoelectron spectroscopy. The as-deposited LAO films were amorphous. Different annealing conditions were necessary to realize crystalline films because of different degrees of tensile strain between crystalline LAO and the SrTiO3 or the Si(001) substrate. When grown on SrTiO3(001), with a lattice mismatch of 2.9%, annealing temperatures of 750 °C for 2 h were necessary. Crystalline films were realized at 600 °C under vacuum at 2 h for SrTiO3-buffered Si(001), with a lattice mismatch of 1.3%. By keeping the annealing temperature relatively low (2 h at 600 °C under vacuum), the interfacial amorphous layer at the STO/Si interface was minimized to about one monolayer and an abrupt interface between SrTiO3 and LAO was maintained.
The step-and-flash imprint lithography process requires the clean separation of a quartz template from a polymer, and the force required to create this separation must be minimized to prevent the generation of defects. Fluorinated surfactant additives to the imprint fluid address this problem by migrating to the template-polymer interface and forming a local layer with ideal properties for adhesive fracture. Tensile and four-point bend fracture experiments show that surfactants lower the modulus of the imprint polymer and decrease the fracture energy. The fracture energy is further decreased by using a nonreactive, liquid surfactant versus a surfactant that reacts with the polymer matrix. Angle-resolved X-ray photoelectron spectroscopy results indicate that surfactant migration is more effective with a fluorinated surface treatment compared to an untreated quartz surface. This result shows that the use of fluorinated surfactants must be accompanied by a surface treatment that produces a similar energy or polarity to induce migration and lower the adhesive strength.
The step and flash imprint lithography (SFIL) process requires the clean separation of a quartz template from a polymer
imprint, and the force required to create this separation must be minimized to prevent the generation of defects.
According to fracture mechanics principles, decreasing both the imprint polymer modulus and the interfacial fracture
energy are beneficial for reducing the separation force. Adjusting the crosslinker concentration in the imprint
formulation decreases the modulus but does not significantly impact the facture energy. On the other hand, fluorinated
surfactant additives to the imprint fluid lower the modulus of the imprint polymer and decrease the fracture energy. The
fracture energy is further decreased by using a nonreactive, liquid surfactant versus a surfactant that reacts with the
polymer matrix. Angle-resolved X-ray photoelectron spectroscopy (XPS) results indicate that surfactant migration is
more effective with a fluorinated surface treatment compared to an untreated quartz surface. This result shows that the
use of fluorinated surfactants must be accompanied by a surface treatment that produces a similar energy or polarity to
induce migration and lower the adhesive strength.
The escalating cost for Next Generation Lithography (NGL) tools is driven in part by the need for complex sources and optics. The cost for a single NGL tool could exceed $50M in the next few years, a prohibitive number for many companies. As a result, several researchers are looking at low cost alternative methods for printing sub-100 nm features. In the mid-1990s, several resarech groups started investigating different methods for imprinting small features. Many of these methods, although very effective at printing small features across an entire wafer, are limited in their ability to do precise overlay. In 1999, Willson and Sreenivasan discovered that imprinting could be done at low pressures and at room temperatures by using low viscosity UV curable monomers. The technology is typically referred to as Step and Flash Imprint Lithography. The use of a quartz template enabled the photocuring process to occur and also opened up the potential for optical alignment of teh wafer and template. This paper traces the development of nanoimprint lithography and addresses the issues that must be solved if this type of technology is to be applied to high-density silicon integrated circuitry.
Step and Flash Imprint Lithography (SFIL) is an alternative lithography technique that enables patterning of sub-100 nm features at a cost that has the potential to be substantially lower than either conventional projection lithography or proposed next generation lithography techniques. SFIL is a molding process that transfers the topography of a rigid transparent template using a low-viscosity, UV-curable organosilicon solution at room temperature and with minimal applied pressure. Employing SFIL technology we have successfully patterned areas of high and low density, semi-dense and isolated lines down to 20 nm, and demonstrated the capability of layer-to-layer alignment. We have also confirmed the use of SFIL to produce functional optical devices including a micropolarizer array consisting of orthogonal 100 nm titanium lines and spaces fabricated using a metal lift-off process. This paper presents a demonstration of the SFIL technique for the patterning of the gate level in a functional MOSFET device.
Recent work on Step and Flash Imprint Lithography (SFIL) has been focused on process and materials fundamentals and demonstration of resolution capability. Etch transfer rpocesses have been developed that are capable of transferring imprinted images though 150 nm of residual etch barrier, yielding sub 50 nm lines with aspect ratios greater than 8:1. A model has been developed for the photoinitiated, free radical curing of the acrylate etch barrier materials that have been used in the SFIL process. This model includes the effects of oxygen transport on the kinetics of the reaction and yields a deeper understanding of the importance of oxygen inhibition, and the resulting impact of that process on throughput and defect generation. This understanding has motivated investigation of etch barrier materials such as vinyl ethers that are cured by a cationic mechanism, which does not exhibit these same effects. Initial work on statistical defect analysis has is reported and it does not reveal pathological trends.
Step and flash imprint lithography (SFIL) is an attractive method for printing sub-100 nm geometries. Relative to other imprinting processes SFIL has the advantage that the template is transparent, thereby facilitating conventional overlay techniques. In addition, the imprint process is performed at low pressures and room temperature, minimizing magnification and distortion errors. The purpose of this work was to investigate alternative methods for defining high resolution SFIL templates and study the limits of the SFIL process. Two methods for fabricating templates were considered. The first method used a very thin (<20 nm) layer of Cr as a hard mask. The second fabrication scheme attempts to address some of the weaknesses associated with a solid glass substrate. Because there is no conductive layer on the final template, scanning electron microscopy (SEM) and defect inspection are compromised. By incorporating a conductive and transparent layer of indium tin oxide on the glass substrate, charging is suppressed during SEM inspection, and the transparent nature of the final template is not affected. Using ZEP-520 as the electron beam imaging resist, features as small as 20 nm were resolved on the templates. Features were also successfully imprinted using both types of templates.
Step and Flash Imprint Lithography (SFIL) is an attractive method for printing sub-100 nm geometries. Relative to other imprinting processes SFIL has the advantage that the template is transparent, thereby facilitating conventional overlay techniques. The purpose of this work is to investigate alternative methods for defining features on an SFIL template. The first method used a much thinner (< 20 nm) layer of Cr as a hard mask. Thinner layers still suppress charging during e-beam exposure of the template, and have the advantage that CD losses encountered during the pattern transfer of the Cr are minimized. The second fabrication scheme addresses some of the weaknesses associated with a solid glass substrate. Because there is no conductive layer on the final template, SEM and defect inspection are compromised. By incorporating a conductive and transparent layer of indium tin oxide on the glass substrate, charging is suppressed during inspection, and the UV characteristics of the final template are not affected. Templates have been fabricated using the two methods described above. Features as small as 30 nm have been resolved on the templates. Sub-80 nm features were resolved on the first test wafer printed.
Step and Flash Imprint Lithography (SFIL) is an attractive method for printing sub-100 nm geometries. Relative to other imprinting processes SFIL has the advantage that the template is transparent, thereby facilitating conventional overlay techniques. In addition, the imprint process is performed at low pressures and room temperature, minimizing magnification and distortion errors. The purpose of this work was to investigate alternative methods for defining high resolution SFIL templates and study the limits of the SFIL process. Two methods for fabricating templates were considered. The first method used a very thin layer of Cr as a hard mask. The second fabrication scheme attempts to address some of the weaknesses associated with a solid glass substrate. Because there is no conductive layer on the final template, SEM and defect inspection are compromised. By incorporating a conductive and transparent layer of indium tin oxide (ITO) on the glass substrate, charging is suppressed during SEM inspection, and the transparent nature of the final template is not affected. Using ZEP-520 as the electron beam imaging resist, features as small as 20 nm were resolved on the templates. Features were also successfully imprinted using both types of templates.
The Step and Flash Imprint Lithography (SFIL) process is a low-cost, high-throughput patterning technique with a sub- 100 nm resolution capability. Investigation by this group and others indicates that the resolution of replication by imprint lithography is limited only by the size of the structures that can be created on the template. It has also been demonstrated that the SFIL process is capable of eliminating contaminants from the template (master) during a step and repeat imprinting process. The low pressure, room temperature nature of SFIL and the transparent imprint templates make it particularly attractive for high- resolution layer-to-layer alignment. Another aspect of SFIL that assists in the layer to layer alignment is the presence of a thin layer of low viscosity liquid between the template and wafer prior to UV curing. The liquid maintains a small gap (~0.2 micrometers ) and acts as lubrication and damping agents, which allows for accurate in situ error measurement and compensation. In this paper, we present results from overlay alignment experiments using the SFIL process. A Canon mask aligner was modified to implement a layer-to-layer alignment scheme for SFIL. The objective of this research was to achieve alignment accuracy of about 0.5 micrometers , which is the practical limit of the X-Y stage in the mask aligner. The overlay alignment error measurements and the corresponding corrections in X,Y and Theta were performed using the modified mask aligner. In its current state, the alignment resolution appears to be limited by the resolution of the mask aligner stage. It is expected that other high resolution alignment techniques have been developed for optical projection lithography and X-ray lithography processes can be adapted to the SFIL process to significantly improve the alignment resolution.
Step and Flash Imprint Lithography (SFIL) is an alternative to photolithography that efficiently generates high aspect-ratio, sub-micron patterns in resist materials. Other imprint lithography techniques based on physical deformation of a polymer to generate surface relief structures have produced features in PMMA as small as 10 nm, but it is very difficult to imprint large depressed features or to imprint a thick films of resist with high aspect-ratio features by these techniques. SFIL overcomes these difficulties by exploiting the selectivity and anisotropy of reactive ion etch (RIE). First, a thick organic 'transfer' layer (0.3 micrometer to 1.1 micrometer) is spin coated to planarize the wafer surface. A low viscosity, liquid organosilicon photopolymer precursor is then applied to the substrate and a quartz template applied at 2 psi. Once the master is in contact with the organosilicon solution, a crosslinking photopolymerization is initiated via backside illumination with broadband UV light. When the layer is cured the template is removed. This process relies on being able to imprint the photopolymer while leaving the minimal residual material in the depressed areas. Any excess material is etched away using a CHF3/He/O2 RIE. The exposed transfer layer is then etched with O2 RIE. The silicon incorporated in the photopolymer allows amplification of the low aspect ratio relief structure in the silylated resist into a high aspect ratio feature in the transfer layer. The aspect ratio is limited only by the mechanical stability of the transfer layer material and the O2 RIE selectivity and anisotropy. This method has produced 60 nm features with 6:1 aspect ratios. This lithography process was also used to fabricate alternating arrays of 100 nm Ti lines on a 200 nm pitch that function as efficient micropolarizers. Several types of optical devices including gratings, polarizers, and sub-wavelength structures can be easily patterned by SFIL.
An alternative approach to lithography is being developed based on a dual-layer imprint scheme. This process has the potential to become a high-throughput means of producing high aspect ratio, high-resolution patterns without projection optics. In this process, a template is created on a standard mask blank by using the patterned chromium as an etch mask to produce high-resolution relief images in the quartz. The etched template and a substrate that has been coated with an organic planarization layer are brought into close proximity. A low-viscosity, photopolymerizable formulation containing organosilicon precursors is introduced into the gap between the two surfaces. The template is then brought into contact with the substrate. The solution that is trapped in the relief structures of the template is photopolymerized by exposure through the backside of the quartz template. The template is separated from the substrate, leaving a UV-curved replica of the relief structure on the planarization layer. Features smaller than 60 nm in size have been reliably produced using this imprinting process. The resolution silicon polymer images are transferred through the planarization layer by anisotropic oxygen reactive ion etching. This paper provides a progress report on our efforts to evaluate the potential of this process.
Solid state femtosecond lasers enable powerful new nonlinear optical spectroscopic characterization techniques for technologically relevant Column IV and III-V semiconductor interfaces and growth surfaces.
Using femtosecond pulses from a Kerr-lens Mode-Locked Ti:Sapphire laser to generate second harmonic from a series of native-oxidized Si(001)/SiO2 samples prepared with systematically varied etch- induced interfacial microroughness, we demonstrate rapid, noncontact, noninvasive measurement of Angstrom-level Si(001)/SiO2 interface roughness. These measurements were performed in air and correlated with atomic force microscopy (AFM) measurements. We also demonstrate in-situ second harmonic monitoring of Si epitaxy in two growth regimes: high temperature (approximately equals 925 K) ultra high-vacuum chemical vapor deposition (UHV-CVD) growth mode and a cyclic atomic layer epitaxy (ALE) growth mode. During UHV-CVD growth of Si on ALE-grown Si0.9Ge0.1(001), we observed interference of the second harmonic signals between the growing Si surface and the buried Si0.9Ge0.1(001) interface. In the ALE growth mode, we monitored several key stages during a full cycle of growth of a partial (approximately equals 0.42) Si monolayer on Si(001) from a disilane (Si2H6) precursor.
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