The mission of QuTech is to bring quantum technology to industry and society by translating fundamental scientific research into applied research. To this end we are developing Quantum Inspire (QI), a full-stack quantum computer prototype for future co-development and collaborative R&D in quantum computing. A prerelease of this prototype system is already offering the public cloud-based access to QuTech technologies such as a programmable quantum computer simulator (with up to 31 qubits) and tutorials and user background knowledge on quantum information science (www.quantum-inspire.com). Access to a programmable CMOS-compatible Silicon spin qubit-based quantum processor will be provided in the next deployment phase. The first generation of QI’s quantum processors consists of a double quantum dot hosted in an in-house grown SiGe/28Si/SiGe heterostructure, and defined with a single layer of Al gates. Here we give an overview of important aspects of the QI full-stack. We illustrate QI’s modular system architecture and we will touch on parts of the manufacturing and electrical characterization of its first generation two spin qubit quantum processor unit. We close with a section on QI’s qubit calibration framework. The definition of a single qubit Pauli X gate is chosen as concrete example of the matching of an experiment to a component of the circuit model for quantum computation.
As the pitch approaches the 10nm node, in order to meet current and future patterning challenges, high resolution techniques are required, complementary to extreme ultraviolet lithography (EUVL) for high volume manufacturing of nanodevices. These complementary techniques should have the following specifications: 1) High patterning resolution, below 10 nm; 2) capability of patterning in 3D; 3) sufficient wafer-scale throughput; 4) the capability of closed loop metrology and 5) the capability of measuring nondestructively through layers, for alignment and overlay applications.
Scanning probe microscopy (SPM) has shown a great degree of nano-scale control, and a great potential to address the challenges found in metrology. There has been a broad development of SPM-based methods for patterning and metrology purposes although its exploitation for technological applications is limited due to the modest throughput of scanning probe based techniques. In this article we present experimental results that include the proof-of-principle of using SSURFM to locate existing buried nanopatterns (lines of 50 nm) and subsequently using our patterning technology to manufacture nanocontact holes aligned to the existing buried lines. In combination with the high throughput parallel scanning probe, this example demonstrates the great potential and the suitability of the group of technologies developed at TNO (consisting of the patterning and the subsurface nanoimaging) for alignment and overlay, especially through opaque layers.
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