Dr. Nicole Saulnier Profile

Dr. Nicole Saulnier

at IBM Thomas J Watson Research Ctr

SPIE Involvement:

Author

Publications (13)

Proceedings Article | 24 March 2020 Presentation

Challenges in the patterning of RRAM devices for analog computing applications (Conference Presentation)

Iqbal Saraf, Shyam Sridhar, Christopher Catano, Sergey Voronin, Dexin Kong, Soon-Cheon Seo, Youngseok Kim, Takashi Ando, Nicole Saulnier, Vijay Narayanan

Proceedings Volume 11329, 113290N (2020) https://doi.org/10.1117/12.2552035

Read Abstract +

Proceedings Article | 30 March 2017 Presentation + Paper

Design intent optimization at the beyond 7nm node: the intersection of DTCO and EUVL stochastic mitigation techniques

Michael Crouse, Lars Liebmann, Vince Plachecki, Mohamed Salama, Yulu Chen, Nicole Saulnier, Derren Dunn, Itty Matthew, Stephen Hsu, Keith Gronlund, Francis Goodwin

Proceedings Volume 10148, 101480H (2017) https://doi.org/10.1117/12.2260865

KEYWORDS: Extreme ultraviolet, Extreme ultraviolet lithography, Stochastic processes, Optical lithography, Lithography, Tolerancing, Computational lithography, Design for manufacturability, Manufacturing, Back end of line, Source mask optimization, Photomasks, Logic, Optical proximity correction, Nanoimprint lithography

Read Abstract +

The initial readiness of EUV patterning was demonstrated in 2016 with IBM Alliance's 7nm device technology. The focus has now shifted to driving the 'effective' k1 factor and enabling the second generation of EUV patterning. Thus, Design Technology Co-optimization (DTCO) has become a critical part of technology enablement as scaling has become more challenging and the industry pushes the limits of EUV lithography. The working partnership between the design teams and the process development teams typically involves an iterative approach to evaluate the manufacturability of proposed designs, subsequent modifications to those designs and finally a design manual for the technology. While this approach has served the industry well for many generations, the challenges at the Beyond 7nm node require a more efficient approach. In this work, we describe the use of “Design Intent” lithographic layout optimization where we remove the iterative component of DTCO and replace it with an optimization that achieves both a “patterning friendly” design and minimizes the well-known EUV stochastic effects. Solved together, this “design intent” approach can more quickly achieve superior lithographic results while still meeting the original device’s functional specifications.

Specifically, in this work we will demonstrate “design intent” optimization for critical BEOL layers using design tolerance bands to guide the source mask co-optimization. The design tolerance bands can be either supplied as part of the original design or derived from some basic rules. Additionally, the EUV stochastic behavior is mitigated by enhancing the image log slope (ILS) for specific key features as part of the overall optimization. We will show the benefit of the “design intent approach” on both bidirectional and unidirectional 28nm min pitch standard logic layouts and compare the more typical iterative SMO approach. Thus demonstrating the benefit of allowing the design to float within the specified range. Lastly, we discuss how the evolution of this approach could lead to layout optimization based entirely on some minimal set of functional requirements and process constraints.

Proceedings Article | 28 March 2017 Paper

An OCD perspective of line edge and line width roughness metrology

Ravi Bonam, Raja Muthinti, Mary Breton, Chi-Chun Liu, Stuart Sieg, Indira Seshadri, Nicole Saulnier, Jeffrey Shearer, Raghuveer Patlolla, Huai Huang

Proceedings Volume 10145, 1014511 (2017) https://doi.org/10.1117/12.2258196

KEYWORDS: Line width roughness, Metrology, Edge roughness, Optical metrology, Process control, Line edge roughness, Semiconductors, Modeling, Scanning electron microscopy, Critical dimension metrology, Semiconducting wafers, Photomasks, 3D modeling, Extreme ultraviolet, Modulation

Read Abstract +

Proceedings Article | 24 March 2017 Paper

Comprehensive analysis of line-edge and line-width roughness for EUV lithography

Ravi Bonam, Chi-Chun Liu, Mary Breton, Stuart Sieg, Indira Seshadri, Nicole Saulnier, Jeffrey Shearer, Raja Muthinti, Raghuveer Patlolla, Huai Huang

Proceedings Volume 10143, 101431A (2017) https://doi.org/10.1117/12.2258194

KEYWORDS: Line width roughness, Edge roughness, Lithography, Extreme ultraviolet lithography, Line edge roughness, Metrology, Photomasks, Semiconducting wafers, Semiconductors, Optical imaging, Photoresist processing, Etching, Extreme ultraviolet, Modulation

Read Abstract +

Proceedings Article | 24 March 2017 Presentation + Paper

Single-expose patterning development for EUV lithography

Anuja De Silva, Karen Petrillo, Luciana Meli, Jeffrey Shearer, Genevieve Beique, Lei Sun, Indira Seshadri, Taehwan Oh, Seulgi Han, Nicole Saulnier, Joe Lee, John Arnold, Bassem Hamieh, Nelson Felix, Tsuyoshi Furukawa, Lovejeet Singh, Ramakrishnan Ayothi

Proceedings Volume 10143, 101431G (2017) https://doi.org/10.1117/12.2261216

KEYWORDS: Optical lithography, Extreme ultraviolet lithography, Extreme ultraviolet, Lithography, Materials processing, Photoresist processing, Etching, Metals, Quantum efficiency, Photoresist materials, Interfaces, Silicon

Read Abstract +

SPIE Journal Paper | 19 July 2016

Improvement of optical proximity-effect correction model accuracy by hybrid optical proximity-effect correction modeling and shrink correction technique for 10-nm node process

Keiichiro Hitomi, Scott Halle, Marshal Miller, Ioana Graur, Nicole Saulnier, Derren Dunn, Nobuhiro Okai, Shoji Hotta, Atuko Yamaguchi, Hitoshi Komuro, Toru Ishimoto, Shunsuke Koshihara, Yutaka Hojo

JM3, Vol. 15, Issue 03, 034002, (July 2016) https://doi.org/10.1117/12.10.1117/1.JMM.15.3.034002

KEYWORDS: Optical proximity correction, Data modeling, Critical dimension metrology, Optical calibration, Scanning electron microscopy, Hybrid optics, Metals, Calibration, Instrument modeling, OLE for process control

Read Abstract +

Proceedings Article | 18 March 2016 Paper

EUV patterning successes and frontiers

Nelson Felix, Dan Corliss, Karen Petrillo, Nicole Saulnier, Yongan Xu, Luciana Meli, Hao Tang, Anuja De Silva, Bassem Hamieh, Martin Burkhardt, Yann Mignot, Richard Johnson, Chris Robinson, Mary Breton, Indira Seshadri, Derren Dunn, Stuart Sieg, Eric Miller, Genevieve Beique, Andre Labonte, Lei Sun, Geng Han, Erik Verduijn, Eunshoo Han, Bong Cheol Kim, Jongsu Kim, Koichi Hontake, Lior Huli, Corey Lemley, Dave Hetzer, Shinichiro Kawakami, Koichi Matsunaga

Proceedings Volume 9776, 97761O (2016) https://doi.org/10.1117/12.2219894

KEYWORDS: Extreme ultraviolet, Optical lithography, Lithography, Extreme ultraviolet lithography, Oxides, Neodymium, Ions, Etching

Read Abstract +

Proceedings Article | 18 March 2016 Paper

EUV implementation of assist features in contact patterns

Fan Jiang, Ananthan Raghunathan, Martin Burkhardt, Nicole Saulnier, Alexander Tritchkov, Srividya Jayaram, James Word

Proceedings Volume 9776, 97761U (2016) https://doi.org/10.1117/12.2218315

KEYWORDS: SRAF, Printing, Extreme ultraviolet, Extreme ultraviolet lithography, Photomasks, Lithography, Model-based design, Manufacturing, Semiconducting wafers, Image quality, Resolution enhancement technologies, 3D modeling, Finite-difference time-domain method

Read Abstract +

Proceedings Article | 18 March 2016 Paper

Comparison of left and right side line edge roughness in lithography

Lei Sun, Nicole Saulnier, Genevieve Beique, Erik Verduijn, Wenhui Wang, Yongan Xu, Hao Tang, Yulu Chen, Ryoung-han Kim, John Arnold, Nelson Felix, Matthew Colburn

Proceedings Volume 9778, 977822 (2016) https://doi.org/10.1117/12.2219665

KEYWORDS: Line edge roughness, Metrology, Lithography, Etching, Semiconductors, Scattering, Inspection, Critical dimension metrology, Photomasks, Roads, Extreme ultraviolet lithography

Read Abstract +

Proceedings Article | 13 March 2015 Paper

Towards production ready processing with a state-of-the-art EUV cluster

Karen Petrillo, Nicole Saulnier, Richard Johnson, Luciana Meli, Chris Robinson, Chiew-seng Koay, Nelson Felix, Daniel Corliss, Matthew Colburn, Takashi Saito, Lior Huli, David Hetzer, Hiroie Matsumoto, Andrew Metz, Yudai Hira

Proceedings Volume 9422, 94220R (2015) https://doi.org/10.1117/12.2085894

KEYWORDS: Extreme ultraviolet, Optical lithography, Extreme ultraviolet lithography, Inspection, Critical dimension metrology, Lithography, Wafer inspection, Semiconducting wafers, Carbon, Signal processing

Read Abstract +

Proceedings Article | 13 March 2015 Paper

EUV processing and characterization for BEOL

Nicole Saulnier, Yongan Xu, Wenhui Wang, Lei Sun, Lin Lee Cheong, Romain Lallement, Genevieve Beique, Bassem Hamieh, John Arnold, Nelson Felix, Matthew Colburn

Proceedings Volume 9422, 94220T (2015) https://doi.org/10.1117/12.2086126

KEYWORDS: Semiconducting wafers, Etching, Line edge roughness, Line width roughness, Extreme ultraviolet lithography, Extreme ultraviolet, Critical dimension metrology, Scanning electron microscopy, Lithography, Scanners

Read Abstract +

Proceedings Article | 31 March 2014 Paper

Hybrid OPC modeling with SEM contour technique for 10nm node process

Keiichiro Hitomi, Scott Halle, Marshal Miller, Ioana Graur, Nicole Saulnier, Derren Dunn, Nobuhiro Okai, Shoji Hotta, Atsuko Yamaguchi, Hitoshi Komuro, Toru Ishimoto, Shunsuke Koshihara, Yutaka Hojo

Proceedings Volume 9052, 90520W (2014) https://doi.org/10.1117/12.2047678

KEYWORDS: Optical proximity correction, Data modeling, Scanning electron microscopy, Critical dimension metrology, Metals, Instrument modeling, Calibration, Metrology, Logic devices, OLE for process control

Read Abstract +

Proceedings Article | 29 March 2013 Paper

Feasibility study of resist slimming for SIT

Nicole Saulnier, Chiew-seng Koay, Matthew Colburn, David Hetzer, Michael Cicoria, Jonathan Ludwicki

Proceedings Volume 8682, 86820E (2013) https://doi.org/10.1117/12.2011506

KEYWORDS: Etching, Lithography, Photoresist processing, Critical dimension metrology, Semiconducting wafers, Line width roughness, Line edge roughness, Scanning electron microscopy, Double patterning technology, Chemical reactions

Read Abstract +

Showing 5 of 13 publications

View contact details

UPDATE YOUR PROFILE

Is this your profile? Update it now.

Sign into your SPIE.org account

Don’t have a profile and want one?

Create an account on SPIE.org

Keywords/Phrases

Search In:

Publication Years