Interconnect architectures based on high-Q silicon photonic microring resonator devices offer a promising solution to
address the dramatic increase in datacenter I/O bandwidth demands due to their ability to realize wavelength-division
multiplexing (WDM) in a compact and energy efficient manner. However, challenges exist in realizing efficient
receivers for these systems due to varying per-channel link budgets, sensitivity requirements, and ring resonance
wavelength shifts. This paper reports on adaptive optical receiver design techniques which address these issues and have
been demonstrated in two hybrid-integrated prototypes based on microring drop filters and waveguide photodetectors
implemented in a 130nm SOI process and high-speed optical front-ends designed in 65nm CMOS. A 10Gb/s powerscalable
architecture employs supply voltage scaling of a three inverter-stage transimpedance amplifier (TIA) that is
adapted with an eye-monitor control loop to yield the necessary sensitivity for a given channel. As reduction of TIA
input-referred noise is more critical at higher data rates, a 25Gb/s design utilizes a large input-stage feedback resistor
TIA cascaded with a continuous-time linear equalizer (CTLE) that compensates for the increased input pole. When
tested with a waveguide Ge PD with 0.45A/W responsivity, this topology achieves 25Gb/s operation with -8.2dBm
sensitivity at a BER=10-12. In order to address microring drop filters sensitivity to fabrication tolerances and thermal
variations, efficient wavelength-stabilization control loops are necessary. A peak-power-based monitoring loop which
locks the drop filter to the input wavelength, while achieving compatibility with the high-speed TIA offset-correction
feedback loop is implemented with a 0.7nm tuning range at 43μW/GHz efficiency.
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