Paper
16 October 2017 Progress in nanoimprint wafer and mask systems for high volume semiconductor manufacturing
Kohei Imoto, Mitsuru Hiura, Hiroshi Morohoshi, Tatsuya Hayashi, Atsushi Kimura, Yoshio Suzaki, Jin Choi
Author Affiliations +
Abstract
Nanoimprint lithography manufacturing equipment utilizes a patterning technology that involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed, leaving a patterned resist on the substrate. The technology faithfully reproduces patterns with a higher resolution and greater uniformity compared to those produced by photolithography equipment. Additionally, as this technology does not require an array of widediameter lenses and the expensive light sources necessary for advanced photolithography equipment, NIL equipment achieves a simpler, more compact design, allowing for multiple units to be clustered together for increased productivity. In this paper, we review the advancements in both wafer imprinting and mask replication systems. To address high volume manufacturing concerns, an FPA-1200 NZ2C four station cluster tool is used in order to meet throughput and cost of ownership requirements (CoO). The status of the tool overlay is discussed. Application of a High Order Distortion Correction system to the existing magnification actuator has enabled correction of high order distortion terms up to K20. Because mask replication is required for nanoimprint lithography, improvements to the FPA-1100 NR2 mask replication system are reviewed. Criteria that are crucial to the success of a replication platform include both particle control and image placement (IP) accuracy. Data is presented on both of these subjects. Particle adders were studied over a nine month period. Additionally, with respect to image placement, an IP accuracy (after removing correctables) of 1.0nm in X, 1.1nm in Y has been demonstrated.
© (2017) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Kohei Imoto, Mitsuru Hiura, Hiroshi Morohoshi, Tatsuya Hayashi, Atsushi Kimura, Yoshio Suzaki, and Jin Choi "Progress in nanoimprint wafer and mask systems for high volume semiconductor manufacturing", Proc. SPIE 10451, Photomask Technology 2017, 104511B (16 October 2017); https://doi.org/10.1117/12.2280440
Advertisement
Advertisement
RIGHTS & PERMISSIONS
Get copyright permission  Get copyright permission on Copyright Marketplace
KEYWORDS
Photomasks

Semiconducting wafers

Lithography

Overlay metrology

Nanoimprint lithography

Particles

Distortion

Back to Top