Presentation
14 March 2018 Optical and electrical interconnect structures for chip-scale silicon photonic transceivers (Conference Presentation)
Koichi Takemura, Yasuhiro Ibusuki, Akio Ukita, Mitsuru Kurihara, Yasuhiko Hagihara, Kazuhiko Kurata
Author Affiliations +
Proceedings Volume 10538, Optical Interconnects XVIII; 105380E (2018) https://doi.org/10.1117/12.2289899
Event: SPIE OPTO, 2018, San Francisco, California, United States
Abstract
High density 3-dimensional optical and electrical I/O structures for chip-scale-packaged Si photonic optical transceivers have been developed. The optical I/O is a vertical polymer waveguide structure made of UV curable resins. The waveguide structure includes 125-μm-pitch 8°-tilted cores, which is called “optical pin.” The tilted optical pins were formed by oblique illuminated photolithography. The optical pins for transmitters confine emitted light from grating couplers in a temperature range from -40°C to 85°C. The optical pins for receivers have inverted-cone shape which acts as a spot size converter connecting a multimode fiber and a smaller integrated surface-illuminated photodiode. Combination of multimode transmission and the optical pins alleviates coupling tolerance as compared with conventional single-mode transmission. The electrical I/O structure for flip-chip bonding comprises 250-μm-pitch regularly arranged through-glass-vias (TGVs). The TGV is a hermetically-sealed W wire and has connecting pads at both ends. The TGVs are connected to a Si photonic chip by Au-to-Au ultrasonic bonding. The outer I/O pads are covered with electroless-plated Ni/Au, so that conventional lead-free soldering can be available. The optical and electrical interfaces for the optical I/O cores with TGVs are placed on the same side of the module. This configuration enables simultaneous optical and electrical bonding to polymer-waveguide-embedded printed circuit boards. Because the developed I/O structures minimize area penalty and support 25 Gbps/ch transmission, Si photonic optical transceivers with the developed I/O structures are suitable for use in photonics electronics converged systems. This research was partly supported by the New Energy and Industrial Technology Development Organization (NEDO).
Conference Presentation
© (2018) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Koichi Takemura, Yasuhiro Ibusuki, Akio Ukita, Mitsuru Kurihara, Yasuhiko Hagihara, and Kazuhiko Kurata "Optical and electrical interconnect structures for chip-scale silicon photonic transceivers (Conference Presentation)", Proc. SPIE 10538, Optical Interconnects XVIII, 105380E (14 March 2018); https://doi.org/10.1117/12.2289899
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KEYWORDS
Silicon photonics

Transceivers

Silicon

Polymers

Waveguides

Optical lithography

Polymer multimode waveguides

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