Paper
4 June 2019 Litho-performance expansion with new SOC made from Hemicellulose
Masahiko Harumoto, Yuji Tanaka, Chisayo Nakayama, You Arisawa, Masaya Asai, Charles Pieczulewski, Harold Stokes, Kimiko Yamamoto, Hiroki Tanaka, Yasuaki Tanaka, Kazuyo Morita
Author Affiliations +
Abstract
Tri-layer processes, which typically consist of photoresist, Si containing anti-reflective coating (Si-ARC) and spin on carbon (SOC), have been widely used since ArF immersion lithography. Continually reduced pattern dimensions need thinner photoresist films due to the common phenomenon of post-develop line collapse with higher aspect ratios. Consequently, it has been necessary to enhance pattern transfer performance after etching with such tri-layer processes. Successfully implementing tri-layer processes requires consideration of issues such as increased process steps, cost, and other inherent limitations of pattern transfer enhancement with a more complicated stack. In this work, we present a hemicellulose SOC material with the outstanding advantage of Si etch selectivity greater than 15. Hemicellulose SOC could significantly reduce pattern transfer limitations for etching, therefore the benefits of processing higher aspect ratio structures can be more easily achieved. Herein, we investigate the hemicellulose SOC lithography performance using resolution, sensitivity, and line width roughness as metrics. Also, we demonstrate these lithography performances through the etching. During the conference, we will discuss the potential issues of next generation processes using ArF immersion and EUV lithography.
© (2019) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Masahiko Harumoto, Yuji Tanaka, Chisayo Nakayama, You Arisawa, Masaya Asai, Charles Pieczulewski, Harold Stokes, Kimiko Yamamoto, Hiroki Tanaka, Yasuaki Tanaka, and Kazuyo Morita "Litho-performance expansion with new SOC made from Hemicellulose", Proc. SPIE 10957, Extreme Ultraviolet (EUV) Lithography X, 109571V (4 June 2019); https://doi.org/10.1117/12.2517692
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KEYWORDS
System on a chip

Silicon

Etching

Extreme ultraviolet

Photoresist materials

Extreme ultraviolet lithography

Line width roughness

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