Design of UART interface based on FPGA

Zixin Lin; Chenxing Liu; Talai Zhao

doi:10.1117/12.2672663

28 March 2023 Design of UART interface based on FPGA

Zixin Lin, Chenxing Liu, Talai Zhao

Proceedings Volume 12597, Second International Conference on Statistics, Applied Mathematics, and Computing Science (CSAMCS 2022); 125972Q (2023) https://doi.org/10.1117/12.2672663
Event: Second International Conference on Statistics, Applied Mathematics, and Computing Science (CSAMCS 2022), 2022, Nanjing, China

Abstract

Universal Asynchronous Receiver Transmitter (UART) is a serial communication interface, which is usually be used for meeting the requirement of low-speed serial communication between devices. Because UART has outstanding performance in both supporting close-distance data transmission and long-distance data transmission, it is used widely in computers and numerous other devices requiring data transmission. The first part of this paper illustrates the early development history, current progress, structure, and operating principle of UART. In the second part, a design of UART circuit module based on FPGA is introduced, which include the sending module, receiving module and the simulation result. The third part is used for giving examples of the applications of UART in several fields, including automatic monitoring system, SIM Card Access, and optical transmission.

Citation Download Citation

Zixin Lin, Chenxing Liu, and Talai Zhao "Design of UART interface based on FPGA", Proc. SPIE 12597, Second International Conference on Statistics, Applied Mathematics, and Computing Science (CSAMCS 2022), 125972Q (28 March 2023); https://doi.org/10.1117/12.2672663

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