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1 May 1994 0.35-micron DUV lithography for poly gate layer
Nigel R. Farrar, Bhanwar Singh
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Proceedings Volume 2196, Integrated Circuit Metrology, Inspection, and Process Control VIII; (1994) https://doi.org/10.1117/12.174135
Event: SPIE's 1994 Symposium on Microlithography, 1994, San Jose, CA, United States
Abstract
The evaluation of processes for 0.35 micron poly gate patterning using DUV negative resist is described. The advantages and drawbacks of negative versus positive resist, for linewidth control, are outlined. The necessity of using top or bottom anti-reflective coatings is examined. The performance of the different process schemes is compared, with regard to linewidth control over isolation topography, reflective notching control, line edge roughness, and line length control. Although the negative tone resist showed good process latitude and performed well, with regard to notching behavior, the high transmission of the resist led to unacceptable linewidth variations unless a bottom anti-reflective coating was used.
© (1994) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
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Nigel R. Farrar and Bhanwar Singh "0.35-micron DUV lithography for poly gate layer", Proc. SPIE 2196, Integrated Circuit Metrology, Inspection, and Process Control VIII, (1 May 1994); https://doi.org/10.1117/12.174135
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KEYWORDS
Deep ultraviolet
Lithography
Bottom antireflective coatings
Photoresist processing
Line edge roughness
Optical lithography
Reflectivity
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