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Narrow channel wavelength division multiplexing (WDM) is an attractive technique for increasing the capacity of optical fibre transmission systems. An essential component for WDM systems is a wavelength demultiplexer capable of providing high levels of isolation between adjacent channels. The control of the device performance with regard to low levels of crosstalk between adjacent channels, operating wavelength, polarisation sensitivity and total device loss is essential. These device characteristics are influenced by material properties and fabrication techniques. Silica based planar technology is a key technology for passive optical components, especially dense wavelength demultiplexers, as required for the next generation of fibre optics communications systems. Fabrication of planar waveguide wavelength demultiplexers has been reported by several workers using different oxide deposition techniques such as flame hydrolysis, plasma enhanced chemical vapour deposition (PECVD) and low pressure chemical vapour deposition (LPCVD). In this paper, high throughput deposition techniques for fabricating various planar waveguide devices, potentially required in WDM systems, will be discussed. Multichannel wavelength demultiplexers with high levels of channel isolation (> 30 dB), will be used as an example for comparing various fabrication technologies. The control and reproducibility of optical and physical properties of the deposited oxide films is crucial for fabricating high performance devices with low insertion loss and high yield. All the above mentioned deposition techniques have been reported to be capable of producing low loss waveguide materials (< 0.05 dBcm-1). The device yield for high performance devices, however, will depend on the ability of any particular technique to control the refractive index uniformity, refractive index homogeneity across the film thickness, waveguide dimensions and shape, and uniformity of film composition and refractive index in the narrow gaps between channel waveguides. These factors need to be controlled across a wafer and from wafer to wafer. This paper discusses the above mentioned requirements and their effect on device performance, focusing particularly on work carried out at Nortel.
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