64x64 smart pixel array for deformable membrane devices

Kris Seunarine; Ian Underwood; Stephen C. Graham; David G. Vass; M. I. Newsam; J. Tom M. Stevenson; Alan M. Gundlach; R. J. Woodburn

doi:10.1117/12.388908

21 June 2000 64x64 smart pixel array for deformable membrane devices

Kris Seunarine, Ian Underwood, Stephen C. Graham, David G. Vass, M. I. Newsam, J. Tom M. Stevenson, Alan M. Gundlach, R. J. Woodburn

Author Affiliations +

Proceedings Volume 3990, Smart Structures and Materials 2000: Smart Electronics and MEMS; (2000) https://doi.org/10.1117/12.388908
Event: SPIE's 7th Annual International Symposium on Smart Structures and Materials, 2000, Newport Beach, CA, United States

Abstract

In this paper we describe the development of a CMOS VLSI backplane for use with micromachined silicon nitride membrane mirrors. The backplane consists of an array of 4096 pixels which are addressed by a 6-bit row decoder. Data enters the chip as a 64-bit logic word at standard CMOS 0-5V levels and is converted to 0-50V at the pixel level by an optimized cascade voltage switch logic circuit.

Citation Download Citation

Kris Seunarine, Ian Underwood, Stephen C. Graham, David G. Vass, M. I. Newsam, J. Tom M. Stevenson, Alan M. Gundlach, and R. J. Woodburn "64x64 smart pixel array for deformable membrane devices", Proc. SPIE 3990, Smart Structures and Materials 2000: Smart Electronics and MEMS, (21 June 2000); https://doi.org/10.1117/12.388908

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