Pattern data processing using 1-nm address grid

Juergen Gramss; Hans Eichhorn; Michael Gehre; Bernd Schnabel; Traugott Schulmeiss; Detlef Melzer; Klaus Kunze; Ulrich Baetz

doi:10.1117/12.479333

16 August 2002 Pattern data processing using 1-nm address grid

Juergen Gramss, Hans Eichhorn, Michael Gehre, Bernd Schnabel, Traugott Schulmeiss, Detlef Melzer, Klaus Kunze, Ulrich Baetz

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Proceedings Volume 4764, 18th European Conference on Mask Technology for Integrated Circuits and Microcomponents; (2002) https://doi.org/10.1117/12.479333
Event: 18th European Mask Conference on Mask Technology for Integrated Circuits and Micro-Components, 2002, Munich-Unterhaching, Germany

Abstract

In the past years the address grid for layout design, data preparation and exposure has been constantly reduced. Currently the ITRS Roadmap specifies 4nm Mask Design Grid for the 100nm technology node. The possibilities and challenges of pattern data processing for the new generation of Leica's Shaped Beam (SB) exposure tools, called SB350MW, are highlighted in this paper. In this context such issues like data volume, data processing time and fracture quality for the new 1nm pattern data format are discussed in detail.

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Juergen Gramss, Hans Eichhorn, Michael Gehre, Bernd Schnabel, Traugott Schulmeiss, Detlef Melzer, Klaus Kunze, and Ulrich Baetz "Pattern data processing using 1-nm address grid", Proc. SPIE 4764, 18th European Conference on Mask Technology for Integrated Circuits and Microcomponents, (16 August 2002); https://doi.org/10.1117/12.479333

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