Paper
17 December 2003 Template fabrication for sub-80-nm contact hole patterning using step and flash imprint lithography
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Abstract
Step and FLash Imprint Lithography (S-FIL) is one of several new methods of imprint lithography being actively developed. Since S-FIL is a 1X printing technique, fabrication of templates is especially critical. The requirement to produce defect-free pillars (needed for imprinting contacts on wafers) in a reliable and manufacturable manner only serves to compound this challenge. In this study, the feasibilty and methodology of fabricating templates having arrays of sub-80 nm pillars is demonstrated. This process involves the use of a Leica VB6 100 keV e-beam system to pattern ZEP 520A resist, followed by a series of chrome and quartz etches to arrive at the final all-quartz template. Wafer printing was done on 200 mm wafers using Molecular Imprints Inc., Imprio-100 system. Critical dimension of template contacts and pillars is shown as a function of e-beam dose. Results of the study have demonstrated that S-FIL templates made with sub-80 nm pillars can be used to reliably replicate 1:1 pitch contact hole arrays on wafers. Sidewall profiles of both template pillars and printed contacts were sloped somewhat, and resulted in an approximately a 20-30 nm bias between contact bottom (smaller) and top opening. Critical dimension uniformity of printed contact arrays within-field and from field-to-field was also explored. Within-field CD uniformity of contacts was found to be less than field-to-field CD uniformity, which was excellent. The feasibility of printing pillar array using S-FIL was also demonstrated. Arrays of pillars measuring 54 nm with a pitch of 1:3 were reliably printed.
© (2003) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
David P. Mancini, Kathleen A. Gehoski, William J. Dauksher, Kevin J. Nordquist, Douglas J. Resnick, Philip Schumaker, and Ian McMackin "Template fabrication for sub-80-nm contact hole patterning using step and flash imprint lithography", Proc. SPIE 5256, 23rd Annual BACUS Symposium on Photomask Technology, (17 December 2003); https://doi.org/10.1117/12.518307
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KEYWORDS
Semiconducting wafers

Critical dimension metrology

Printing

Lithography

Etching

Photoresist processing

Cadmium

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