Interfacing methodologies for IP re-use in reconfigurable system-on-chip

Tien-Lung Lee; Neil W. Bergmann

doi:10.1117/12.523336

30 March 2004 Interfacing methodologies for IP re-use in reconfigurable system-on-chip

Tien-Lung Lee, Neil W. Bergmann

Proceedings Volume 5274, Microelectronics: Design, Technology, and Packaging; (2004) https://doi.org/10.1117/12.523336
Event: Microelectronics, MEMS, and Nanotechnology, 2003, Perth, Australia

Abstract

Initially, IP cores in Systems-on-Chip were interconnected through custom interface logic. The more recent use of standard on-chip buses has eased integration and eliminated inefficient glue logic, and hence boosted the production of IP functional cores. However, once an IP block is designed to target a particular on-chip bus standard, retargeting to a different bus is time-consuming and tedious. As new bus standards are introduced and different interconnection methods are proposed, this problem increases. Many solutions have been proposed, however these solutions either limit the IP block performance or are restricted to a particular platform. A new methodology is presented that can automate the connection of an IP block to a wide variety of interface architectures with low overhead through the use a special Interface Adaptor Logic layer.

Citation Download Citation

Tien-Lung Lee and Neil W. Bergmann "Interfacing methodologies for IP re-use in reconfigurable system-on-chip", Proc. SPIE 5274, Microelectronics: Design, Technology, and Packaging, (30 March 2004); https://doi.org/10.1117/12.523336

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