Paper
30 June 2005 Performance requirements for analog-to-digital converters in wideband reconfigurable radios
David Naughton, Gerard Baldwin, Ronan Farrell
Author Affiliations +
Proceedings Volume 5837, VLSI Circuits and Systems II; (2005) https://doi.org/10.1117/12.608486
Event: Microtechnologies for the New Millennium 2005, 2005, Sevilla, Spain
Abstract
With the current trend towards software defined radio, several candidate architectures for the analog receiver front-end have been presented. A common proposal for software defined reconfigurable radio is to develop a wideband ADC and utilise this for capturing a large segment of the spectrum. This would enable the subsequent signal processing operations of channel selection and data extraction to be carried out by a digital processor. This would allow the radio to be reconfigured by simply changing the software. In analysis of these systems, powerful neighbouring signals, or blockers, are considered but it has been conveniently assumed that suitable dynamic range will be available at the ADC. This is an acceptable assumption in narrowband systems where automatic gain control and analogue channel select filters can be used, but is not appropriate for a wideband system. In this paper we present an analysis based on bit-error-rates (BER) which shows the effect of blockers in a wideband architecture on the performance of the communication link and on the dynamic range requirements of the ADC.
© (2005) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
David Naughton, Gerard Baldwin, and Ronan Farrell "Performance requirements for analog-to-digital converters in wideband reconfigurable radios", Proc. SPIE 5837, VLSI Circuits and Systems II, (30 June 2005); https://doi.org/10.1117/12.608486
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KEYWORDS
Signal to noise ratio

Quantization

Receivers

Electronic filtering

Digital filtering

Phase shift keying

Computer simulations

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