Paper
20 October 2006 Study of chromeless mask quartz defect detection capability for 80-nm post structure
Jerry Lu, Boster Wang, Frank F. Chen, Orion Wang, Jomarch Chou, Orson Lin, Jackie Cheng, Ellison Chen, Paul Yu
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Abstract
Chrome-less Phase Lithography (CPL) was introduced as a potential strong Resolution Enhancement Technology (RET) for 90nm to 65nm node critical layers. One of the important issue with trench type chrome-less mask manufacturing for post structure is quartz defect detection capability. This study will focus on half pitch 80nm (1X) design node and apply different trench sizes and programmed defect sizes. All test patterns will be inspected on KLA-Tencor TeraScan576 inspection tool with both standard Die-to-Die (DD) and TeraPhase DD inspection modes to determine defect detection capability. All programmed defects will also be simulated on the Zeiss AIMS Fab-193 to determine wafer CD error. Finally, we will establish the relationship between trench size, defect detection capability and printability, and summarize the chrome-less mask quartz defect detection capability for 80nm post structure application.
© (2006) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Jerry Lu, Boster Wang, Frank F. Chen, Orion Wang, Jomarch Chou, Orson Lin, Jackie Cheng, Ellison Chen, and Paul Yu "Study of chromeless mask quartz defect detection capability for 80-nm post structure", Proc. SPIE 6349, Photomask Technology 2006, 63493K (20 October 2006); https://doi.org/10.1117/12.685660
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KEYWORDS
Inspection

Photomasks

Defect detection

Quartz

Reticles

Semiconducting wafers

Lithography

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