Methodical approach to improve defect detection sensitivity on lithography process using DUV inspection system

Changgoo Lee; Sera Won; Daeyoung Seo; Hyeonsoo Kim; Jinwoong Kim; Jeong-Ho Yeo; Ido Dolev; Chan-Hee Kwak

doi:10.1117/12.711740

5 April 2007 Methodical approach to improve defect detection sensitivity on lithography process using DUV inspection system

Changgoo Lee, Sera Won, Daeyoung Seo, Hyeonsoo Kim, Jinwoong Kim, Jeong-Ho Yeo, Ido Dolev, Chan-Hee Kwak

Author Affiliations +

Proceedings Volume 6518, Metrology, Inspection, and Process Control for Microlithography XXI; 65182E (2007) https://doi.org/10.1117/12.711740
Event: SPIE Advanced Lithography, 2007, San Jose, California, United States

Abstract

Adoption of immersion technology to push printing resolution with existing wavelength (193nm) brings to many concerns about defect controls on lithography process. Along with aggressive design rule shrinkage k1 factor of lithography process is close to 0.3 and this low k1 factor process results in very tight process window. Narrow process window easily induces various types of pattern failure with lithography process variation. Therefore requirements of sensitive defect detection on lithography step are grown with the adoption of immersion and low k1 regime processing. Similar to lithography resolution enhancement with shorter wavelength the inspection tool also is required to move forward to shorter wavelength to improve defect sensitivity through resolution improvement and scattering cross section increase. Therefore the main wavelength regime on high end defect inspection system is already shifted to DUV. In this paper, we would like to report improvement of defect detection sensitivity on lithography process inspection through step by step trace of the defect formation and shape. Throughout the process flows till final etch and cleaning process from lithography the SEM non-visible defects or buried defects on lithography step are turned into line open or line thinning which are killer defects and has low defect signal on cleaning step. Also the benefits of DUV inspection system on lithography layer application is discussed through wafer noise suppression from Anti Reflection Coating (ARC) and larger defect signal from effective defect size increasing.

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Changgoo Lee, Sera Won, Daeyoung Seo, Hyeonsoo Kim, Jinwoong Kim, Jeong-Ho Yeo, Ido Dolev, and Chan-Hee Kwak "Methodical approach to improve defect detection sensitivity on lithography process using DUV inspection system", Proc. SPIE 6518, Metrology, Inspection, and Process Control for Microlithography XXI, 65182E (5 April 2007); https://doi.org/10.1117/12.711740

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KEYWORDS

Lithography

Inspection

Scanning electron microscopy

Signal to noise ratio

Deep ultraviolet

Semiconducting wafers

Etching

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