Real-time lane detector hardware system

Pedro Cobos Arribas; Felipe Jiménez Alonso

doi:10.1117/12.723615

10 May 2007 Real time lane detector hardware system

Pedro Cobos Arribas, Felipe Jiménez Alonso

Proceedings Volume 6590, VLSI Circuits and Systems III; 65900O (2007) https://doi.org/10.1117/12.723615
Event: Microtechnologies for the New Millennium, 2007, Maspalomas, Gran Canaria, Spain

Abstract

This paper presents a design adapting the Kalman Filter to the vehicle system domain and Field Programmable Logic technology. The objective to which the system will be applied is detection of road lines from visual information, derived from a low cost monochrome camera with real time response requirements and good results for real scenarios (secondary roads, rain, damaged or occluded road lines..). The sections will describe how the original algorithm is mapped to a real time hardware vision system, that includes a low-cost FPGA processing system and a camera, for vehicle applications. The paper will also illustrate how the needed tasks have been implemented on the FPGA, with the logical architectural restrictions. It mentions also the ways in which overall performance will be increased.

Citation Download Citation

Pedro Cobos Arribas and Felipe Jiménez Alonso "Real time lane detector hardware system", Proc. SPIE 6590, VLSI Circuits and Systems III, 65900O (10 May 2007); https://doi.org/10.1117/12.723615

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