Paper
22 March 2008 Overlay metrology at the crossroads
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Abstract
The introduction of new techniques such as double patterning will reduce overlay process tolerance much faster than the rate at which critical feature dimensions are shrinking. In order to control such processes measurements with uncertainties under 0.4nm are desirable today and will become essential within the next few years. This very small error budget leads to questions about the capability of the imaging technology used in overlay tools today and to evaluation of potential replacement techniques. In this paper we will show that while imaging technology is in principle capable of meeting this requirement, the real uncertainty in overlay within devices falls well short of the levels needed. A proper comparison between techniques needs to focus on all of the possible sources of error, and especially those that cannot be simply reduced by calibration or by repeating measurements. On that basis there are more significant problems than the relative capability of different measurement techniques. We will discuss a method by which overlay within the device area can be controlled to the required tolerance.
© (2008) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Nigel P. Smith, Lewis A. Binns, Albert Plambeck, and Kevin Heidrich "Overlay metrology at the crossroads", Proc. SPIE 6922, Metrology, Inspection, and Process Control for Microlithography XXII, 692203 (22 March 2008); https://doi.org/10.1117/12.782035
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CITATIONS
Cited by 4 scholarly publications.
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KEYWORDS
Overlay metrology

Semiconducting wafers

Data modeling

Diffraction

Process control

Scanners

Reflectivity

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