Challenges in process marginality for advanced technology nodes and tackling its contributors

Aravind Narayana Samy; Roberto Schiwon; Rolf Seltmann; Frank Kahlenberg; Ushasree Katakamsetty

doi:10.1117/12.2047086

1 October 2013 Challenges in process marginality for advanced technology nodes and tackling its contributors

Aravind Narayana Samy, Roberto Schiwon, Rolf Seltmann, Frank Kahlenberg, Ushasree Katakamsetty

Proceedings Volume 8886, 29th European Mask and Lithography Conference; 888609 (2013) https://doi.org/10.1117/12.2047086
Event: 29th European Mask and Lithography Conference, 2013, Dresden, Germany

Abstract

Process margin is getting critical in the present node shrinkage scenario due to the physical limits reached (Rayleigh’s criterion) using ArF lithography tools. K1 is used to its best for better resolution and to enhance the process margin (28nm metal patterning k1=0.31). In this paper, we would like to give an overview of various contributors in the advanced technology nodes which limit the process margins and how the challenges have been tackled in a modern foundry model. Advanced OPC algorithms are used to make the design content at the mask optimum for patterning. However, as we work at the physical limit, critical features (Hot-spots) are very susceptible to litho process variations. Furthermore, etch can have a significant impact as well. Pattern that still looks healthy at litho can fail due to etch interactions. This makes the traditional 2D contour output from ORC tools not able to predict accurately all defects and hence not able to fully correct it in the early mask tapeout phase. The above makes a huge difference in the fast ramp-up and high yield in a competitive foundry market. We will explain in this paper how the early introduction of 3D resist model based simulation of resist profiles (resist top-loss, bottom bridging, top-rounding, etc.,) helped in our prediction and correction of hot-spots in the early 28nm process development phase. The paper also discusses about the other overall process window reduction contributors due to mask 3D effects, wafer topography (focus shifts/variations) and how this has been addressed with different simulation efforts in a fast and timely manner.

Citation Download Citation

Aravind Narayana Samy, Roberto Schiwon, Rolf Seltmann, Frank Kahlenberg, and Ushasree Katakamsetty "Challenges in process marginality for advanced technology nodes and tackling its contributors", Proc. SPIE 8886, 29th European Mask and Lithography Conference, 888609 (1 October 2013); https://doi.org/10.1117/12.2047086

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