1 November 2010 Design correction in extreme ultraviolet lithography
Author Affiliations +
Abstract
Extreme ultraviolet (EUV) lithography is currently the most promising technology for advanced manufacturing nodes. This study aims to assess in detail the quality of a full chip optical correction for a EUV design, as well to discuss the available approaches to compensate for EUV-specific effects. Extensive data sets have been collected on the ASML EUV Alpha-Demo Tool using the latest Interuniversity Microelectronics Center baseline resist Shin-Etsu SEVR59. In total ~1300 critical dimension (CD) measurements at wafer level and 700 at mask level were used as input for model calibration and validation. The smallest feature size in the data set was 32 nm. Both one-dimensional and two-dimensional structures through CD and pitch were measured. The reticle used in this calibration exercise allowed one to modulate flare by varying tiling densities. The shadowing effect was modeled by means of a single bias correction throughout the design. Horizontal and vertical features of different types through pitch and CD were used to calibrate the shadowing correction. The model calibration yielded an root-mean square of ~1 nm, which was observed to improve by including reticle CD data. An EUV mask fully corrected for optical proximity correction, flare and shadowing was fabricated and qualified, demonstrating the effectiveness of the implemented corrections.
©(2010) Society of Photo-Optical Instrumentation Engineers (SPIE)
Germain L. Fenger, Gian F. Lorusso, Eric Hendrickx, and Ardavan Niroomand "Design correction in extreme ultraviolet lithography," Journal of Micro/Nanolithography, MEMS, and MOEMS 9(4), 043001 (1 November 2010). https://doi.org/10.1117/1.3496030
Published: 1 November 2010
Lens.org Logo
CITATIONS
Cited by 6 scholarly publications and 1 patent.
Advertisement
Advertisement
RIGHTS & PERMISSIONS
Get copyright permission  Get copyright permission on Copyright Marketplace
KEYWORDS
Data modeling

Calibration

Photomasks

Semiconducting wafers

Extreme ultraviolet lithography

Optical proximity correction

Critical dimension metrology

RELATED CONTENT

EUV OPC modeling and correction requirements
Proceedings of SPIE (March 18 2014)
OPC model building for EUV lithography
Proceedings of SPIE (September 26 2019)
Model calibration and validation for pre-production EUVL
Proceedings of SPIE (March 23 2012)
Accurate models for EUV lithography
Proceedings of SPIE (September 23 2009)
Full chip correction of EUV design
Proceedings of SPIE (March 20 2010)

Back to Top