Computer-aided landuse planning can be broken into two important phases. These two phases, which I will refer to as Data Collection and Modeling, make separate demands on the architecture of the image processor. The first phase involves the creation of large geographic databases containing a wide variety of geographic variables. Figure 1 (2) shows an example of such a database, created to model growth and impacts on a suburban region south of Poston, Massachusetts. Each entry on the list refers to a data "element", a complete map of the distribution of that variable. Some data elements are continuously varying numeric values (e.g., topographic elevation); other elements contain purely nominal values (e.g., vegetation type) where each value refers to a specific type. The major feature that each element in the database has in common with the others is that they all are registered in space or contain the information necessary to effect such registration quickly. The sources for each data element vary. Some are digitally produced and therefore available in digital form; others are compiled by hand and drawn manually or with a digital plotter. Many have to be laboriously digitized. Continuous variables are often digitized in a gridded form, while discrete, homogeneous variables are typically digitized in some sort of polygon form where only the boundaries between regions are stored. This second type of digitization and storage method appeals to cartographers and substantial research(l) is being devoted to the processing of such data, but this paper will only address it when it must be converted to gridded form for processing.

The design of digital image processing systems for geological applications will be driven by the nature and complexity of the intended use, by the types and quantities of data, and by systems considerations. Image processing will be integrated with geographic information systems (GIS) and data base management systems (DBMS). Dense multiband data sets from radar and multispectral scanners (MSS) will tax memory, bus, and processor architectures. Array processors and dedicated-function chips (VLSI/VHSIC) will allow the routine use of FFT and classification algorithms. As this geoprocessing capability becomes available to a larger segment of the geological community, user friendliness and smooth interaction will become a major concern.

Cartography and remote sensing are two disciplines that share several common characteristics. The techniques employed by both are usually supportive to other disciplines such as geology or forestry and are not usually applied in the absence of user prerequisites. Both are subdivided into professional subdisciplines such as photogrammetry, geodesy, and computer image processing. And both share a parallel series of endeavors--categorization, rectification, design, and publication. With the advent of digital cartography, the symbiotic relationship with remote sensing is further enhanced and the capability to perform sophisticated analysis using digital data bases will he extended to the point that instant customized maps, both conventional and video, will be common and widely available. The extensive knowledge of rectification by cartographers can he especially valuable when applied to remote sensing and will be essential to achieve optimum map projections and data overlay.

The Defense Mapping Agency. Aerospace Center has developed a program to exploit digital image technology for the advancement of mapping, charting, and geodesy. Primary investigations include image processing, analysis, and display techniques, and computer image generation. A dramatic impact has been made in the ability to produce, analyze, and validate various digital data bases produced by the Defense Mapping Agency by applying state-of-the-art digital image technology concepts to the development of new interactive prototype and production cartographic systems.

We present an overview of digital image processing (DIP) at universities in the United States. Thirteen were surveyed and the results are given here. We identify other universities with DIP activities, we describe a typical sequence of courses, and we list some of the research activities.

The Honeywell Image Research Laboratory was created to provide an algorithm development engineering tool for real time image processing systems. Complex algorithms can be developed and studied prior to expensive commitment to special purpose real time hardware.

The requirements imposed upon image processing systems vary significantly as a function of the application. Imagery generated and used for legal purposes imposes needs for processing which typically are different from other disciplines where imagery is applied to the solution of problems. The basic operations by which imagery is manipulated are more similar than different from field to field; however, the combinations of functions applied to the imagery, and the purpose of the processed data or image, are what set each complete processing system apart. Parts I and II of this paper will illustrate by example and description of dedicated facilities, the most effective image processing operations used by the legal and law enforcement communities. The community's influence on system design has led to unique image processing operations; however, a combination of multi-varied needs and a relatively limited application of image processing to "legal" problems place the state of this technology in an evolving mode. Feedback from the evolution has led to our prescription for the design of a digital image processing system for legal applications.

In order to adapt to the steady growth of modern communication requirements in information processing, the overall computing power is being decentralised to special purpose intelligent terminals. In contrast to the well developed graphic displays, the currently available image displays have very little processing capabilities. The complexity and volume of imagery requires a special approach to enable real-time processing. In this paper a new image computer, called UPIC is proposed which features rather general image processing capabilities at television rates combined with powerful interactive computer graphics.

General-purpose processors alone are sometimes inadequate for digital image processing applications due to the amount of data which must be processed and/or the computational complexity of the algorithms used. An array processor can be used effectively to off-load large image processing tasks from the host processor. Array processors are well-suited to performing typical image processing functions, and extensive off-the-shelf hardware and software are readily available at a reasonable cost. Faster processing elements which run in parallel and/or may be pipelined can yield a typical performance improvement of an order of magnitude compared to a general-purpose processor. Moreover, because an array processor removes most of the image processing function from the host processing environment, overall system throughput is also significantly improved.

This paper will investigate the role of the image display as a computational processing element in an image processing system. Specific architectural philosophies that allow the traditional image display to double as an image processor will be discussed. Algorithms using the image display as a processor will be presented and compared with traditional approaches.

The similarities in display system requirements for image processing and raster computer graphics are discussed. A system architecture designed to provide high speed hardware capability for both areas is outlined. A feedback type image processor is included for common image processing operations. A high speed microprogrammable processor is included for real-time graphics and complex image processing and analysis.

A new high-speed motion analysis system provides 2000 frames/second recording and instant replay. Subframe pictures can be taken at 12,000 pictures per second. The recording medium is magnetic tape packaged in a cassette which stores 45 seconds at the highest speed. The key technical advance which made the system possible include a new solid-state 192 x 240 image sensor array which can be read at 108 pixels/second. Recording at practical tape speeds was achieved through the development of high density magnetic heads and tape specifically for this system. In addition to high speed operation, the system was designed to ease the entire range of image analysis tasks. Analog data channels may be recorded and reproduced synchronously with the image sequence. The instrument permits full remote control by a host computer, and random read/write access to the internal digital frame store for image enhancement and pattern recognition applications.

The algorithmic solution to many image-processing problems frequently uses sums of products where each multiplicand is an input sample (pixel) and each multiplier is a stored coefficient. This paper presents a large-scale integrated circuit (LSIC) implementation that provides accumulation of nine products and discusses its evolution from design through application 'A read-only memory (ROM) accumulate algorithm is used to perform the multiplications and is the key to one-chip implementation. The ROM function is actually implemented with erasable programmable ROM (EPROM) to allow reprogramming of the circuit to a variety of different functions. A real-time brassboard is being constructed to demonstrate four different image-processing operations on TV images.

In 1981, Vicom Systems, Inc. introduced an image processing display system with a radically different architecture that permits real-time image processing within the display itself at a cost commensurate with older generation displays. This paper presents a description of the architecture of the VICOM Digital Image Processor.

Recent advances in the design of image processing and display equipment have occurred in two key areas, namely, data flow architectures and pipeline array processor architectures. Data flow involves the use of high speed data interfaces to the display processor, a flexible internal bus architecture, and efficient access to display processor memories. Image processing power is achieved through the use of pipeline processors rather than high-speed, large address-space, integral CPUs. Hardware constraints impact the design of algorithms which take advantage of the 70 nanosecond pixel rates and the computational power of the pipeline processors. The DeAnza Systems IP 8500 and IP 1172 image processing display systems exemplify architectural advances in data flow and pipeline processor architectures.

We present a powerful image processing workstation based on a digital video processor, a 16-bit minicomputer and an array processor. Outstanding interactive performance is achieved by the division of image processing operations into concurrent functions best suited for each individual processor.

This paper presents the results of a study effort to define and specify an architecture for the purpose of ingesting, storing, exploiting, and verifying reconnaissance imagery. The defined architecture consists of four functional modules: Sensor Input Module (SIM), Storage and Retrieval Module (S/RM), Real-Time Processing Module (RTPM), and Near Real-Time Exploitation Module (NRTEM). These functional modules and the associated hardware subsystems will perform the ingest, handling, and display of imagery from the required sensor data types.

As a rule, different image processing user communities have required such different hardware environments that it has not seemed feasible to propose a single system that would be suitable for virtually all of them. After careful analyses of different systems, a decomposition into separate logical subsystems is possible. A software architecture is proposed that integrates these logical units in such a way as to allow the same architecture to be implemented on an almost unlimited range of hardware, yet remain able to be optimized in accordance with the particular needs of the system users. In particular, a wide range of implementations can be described, which range from a dedicated single-user system with rather limited capabilities through a network of a hundred or more users, each having substantial real time and near-real time processing resources.

An image processing system is described which produces in real-time the high resolution HRPT imagery received from the TIROS-N/NOAA-6 satellites. The digital image processing is performed by a programmable Pipeline Processor under control of a P857 computer. The processing modules of the Pipeline Processor are dynamically loaded with transfer function data e.g. to calibrate the infrared data, to carry out the panoramic correction and to add the geographic grid and map accurately. The computer is part of an interactive system to input the processing parameters and the orbital data in a user-oriented way. The control of the station operation during satellite passes, including the (pre)processing, is done automatically following a preprogrammed sequence.

The design requirements and implementation of a testbed for both interactive and automatic computer vision systems is described. The design requirements include not only a fully integrated approach to computer vision techniques including statistical pattern recognition and artificial intelligence techniques, but also support to several different user groups with quite different backgrounds. The implementation has been carried out under UNIX using a variety of languages including C, FORTRAN, and LISP.

The successful application of modern digital image processing techniques in many areas depends strongly on the degree of interactivity and throughput provided by the hardware and software architectures of the image processing system being used. Recognizing this fact, designs for digital image processing systems have evolved from a first generation based on the use of batch processing and large "mainframe" computers, to a second generation based on dedicated minicomputers, and recently to a third generation based on the combination of a "super-minicomputer" with commercially available array and special purpose processors. This paper describes a particularly powerful third generation system under development which has been designed with high throughput and interactivity as a prime consideration.

A microcomputer based system used in an airborne remote sensing application and for interactive image processing is described. The system hardware includes a two dimensional charge coupled device imaging array, a visual display monitor for real-time display of digitized picture information, and a floppy disk for permanent storage of data. The central processor unit is an Intel 8080. The software used for interactive image processing and remote sensing applications is evaluated. A next-generation system design is discussed.

The use of computerized geographic data bases for representation of spatial variables has undergone generations of development since its early 1970's beginnings with the inception of Harvard's GRID and IMGRID computer programs for multivariate spatial analysis. Geographic data analysis has subsequently been moved from large computers to minicomputers and now finally to microcomputers with radical reductions in costs associated with planning analyses.

The tone scale or gradation of a continuous tone picture is the most important factor related to the quality of an image. We have developed special purpose analog and digital circuitry which enables the real-time (30 updates per second) computation of a tone scale transformation which is then applied to a digitized picture being displayed on a television monitor. In our system the tone scale transformations are controlled by knobs which are labelled in terms meaningful to photographic artisans, rather than requiring an operator to specify points on a transfer characteristic as is common with other systems. These knobs directly specify minimum and maximum densities, brightness, and shadow, highlight and overall contrast. These control parameters may be selectively enabled by the operator. After the appropriate aesthetic modifications have been achieved on the television display, the operator may initiate the transformation of the complete stored image prior to subsequent computer processing or hard copy output.

Image processing activities at the Institut fur Kommunikationstechnik are concerned with biological and remote sensing applications which are carried out in close collaboration with external research groups. To date, image processing entirely relied on the services provided by the central computing facilities and photomechanical image read/write hardware at the institute. Systematic image manipulations like geometric and radiometric corrections, enhancement and restoration or some types of non-linear filtering were performed in volume within the given configuration. Considerable turnaround times have frustrated attempts at scene related processing. An interactive image processing facility was designed to provide computing power compatible with the central computing facilities, fast data handling, and multi-user access for image processing sessions and software development. The configuration is based on a VAX 11/780 host computer linked to two front end image display stations with local intelligence and to high quality image read/write devices. Data management is facilitated by two tape drives and more than 300 Mbyte disk storage.

A simple, low-cost video bandwidth compressor has been developed. The design provides for interface to both interlaced and non-interlaced TV and FLIR sensors. Data rate reduction is obtained through the use of several methods including the hybrid DCT/DPCM algorithm, frame rate reduction, resolution reduction, and image truncation. The overall data rate reduction is up to 1000:1 and the picture quality is in excess of 36db at 2 bits per pixel.

The labeling process of connected regions is a typical recursive procedure, requiring backtracks at each point where regions are found to recombine. Backtracks can be carried out by using a second pass through the complete image. The algorithm discussed in this paper combines in a single pass the labeling of connected regions with the generation of a data structure containing global features like area, first order moments, perimeter, circumscribed rectangle, of all labeled regions. Backtracks take advantage of indirect adressing in order to restrict each region merging to just a few memory transfers. The problem of chaining encountered in more complex image configurations requires backtrack from the merging point to more than one previously labeled domain. As the use of associative memories to deal with this problem is still of theoretical interest, a completely different approach using only random accessible memories is described in this paper. The information concerning either multiple or single backtracks is build up in a compact data structure consisting of two linked lists, set up interactively, the first pointing forwards, the other backwards. Moreover, a separate data structure, lists for each coherent region the labels of its inclusions. Two connected linked lists are sufficient to represent these hierarchical-tree-like relations within the complete image. The algorithm is inten-ded to be implemented in hardware, operating at realtime TV scan speed. This requirement can be met using a buffer FIFO memory, because the algorithm is active only at critical points. In this way the resulting global cycle time is expected to slightly exceed one image frame time. Memory requirements are rather small as runs are the smallest elements instead of pixels, and as the number of list entries to labels, inclusions and features are limited to the maximal expected number of (a priori) connected regions.

This paper describes a method of hybrid processing of data and its applications in various spheres. The principle is to use an optical Fourier transform device coupled to a minicomputer via a mechanically-driven diaphragmed monodiode scanning system. The principles and technologies are discussed.