Presentation + Paper
20 March 2019 Improved wafer alignment model algorithm for better on-product overlay
Author Affiliations +
Abstract
To support the manufacturing of DRAM semiconductors for next and future nodes, there is a constant need to reduce the overlay fingerprints. In this paper we evaluate algorithms which are capable of decoupling wafer deformation from mark deformation and extrapolation effects. The algorithms enable lithography tools to use only the wafer deformation component in the alignment feedforward correction. Therefore improving the (wafer to wafer) overlay. First results will be shared showing improvement of wafer to wafer variation in high-volume manufacturing environment.
Conference Presentation
© (2019) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Ik-Hyun Jeong, Hyun-Sok Kim, Yeong-Oh Kong, Ji-Hyun Song, Jae-Wuk Ju, Young-Sik Kim, Cees Lambregts, Miao Yu, Rizvi Rahman, Leendertjan Karssemeijer, Elliott McNamara, Paul Böcker, Jong-Cheol Choi, Nang-Lyeom Oh, Kang-San Lee, and Jin-Seo Lee "Improved wafer alignment model algorithm for better on-product overlay", Proc. SPIE 10961, Optical Microlithography XXXII, 109610A (20 March 2019); https://doi.org/10.1117/12.2516259
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KEYWORDS
Optical alignment

Semiconducting wafers

Calibration

Data modeling

Overlay metrology

Metrology

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