Concurrent design rule, OPC and process optimization in EUV Lithography (Conference Presentation)

Dongbo Xu; Werner Gillijns; Ling Ee Tan; Jae Uk Lee; Ryoung-Han Kim

doi:10.1117/12.2553212

25 March 2020 Concurrent design rule, OPC and process optimization in EUV Lithography (Conference Presentation)

Dongbo Xu, Werner Gillijns, Ling Ee Tan, Jae Uk Lee, Ryoung-Han Kim

Proceedings Volume 11328, Design-Process-Technology Co-optimization for Manufacturability XIV; 1132804 (2020) https://doi.org/10.1117/12.2553212
Event: SPIE Advanced Lithography, 2020, San Jose, California, United States

Abstract

Design rule for advanced logic node is optimized together with EUV NXE 3400 wafer data and OPC performance. Imaging parameters such as SMO source, dose sensitivity, MEEF and other are considered in defining the pattern fidelity and associated design rules. In addition, positive tone development (PTD) process employing Dark Field (DF) EUV mask and negative tone development (NTD) process using Bright Field (BF) mask are included in the scope. Key differences between PTD and NTD process will be discussed from the perspective of fundamental imaging, OPC and lithography process. At last, stochastic effect will be evaluated on the key design rules such as tip- to-tip, tip-to-line, width/space etc.

Conference Presentation

Citation Download Citation

Dongbo Xu, Werner Gillijns, Ling Ee Tan, Jae Uk Lee, and Ryoung-Han Kim "Concurrent design rule, OPC and process optimization in EUV Lithography (Conference Presentation)", Proc. SPIE 11328, Design-Process-Technology Co-optimization for Manufacturability XIV, 1132804 (25 March 2020); https://doi.org/10.1117/12.2553212

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