Presentation
24 February 2021 New scaling enablers in computational lithography
Author Affiliations +
Abstract
Market forces have compressed the various node transition phases in the semiconductor supply chain – Pathfinding, Ramp, and HVM. In addition to time pressures, there are competing demands for architectural tradeoffs, novel applications, and emerging imperatives like Machine Learning (ML) and Cloud-readiness. To tackle these multi-front challenges, today’s Computational Lithography EDA solution needs to be a multi-component offering that fosters a closed loop, system-wide optimization for each phase, while allowing customizations to satisfy the requirements of the different phases. In this talk, we identify the essential components of such an EDA solution as: Predictive model, Multi-constrained, globally-aware correction scheme, Stochastic awareness, Curvilinear mask-fracture awareness, and All embedded in a Cloud-ready, ML-enabled, flexible platform. We show how these components support the competing demands for the various phases in the semiconductor manufacturing lifecycle.
Conference Presentation
© (2021) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Kunal N. Taravade "New scaling enablers in computational lithography", Proc. SPIE 11613, Optical Microlithography XXXIV, 1161303 (24 February 2021); https://doi.org/10.1117/12.2589319
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