Presentation + Paper
10 April 2024 EUV lithography: LER design, mask, and wafer impact
Jiahui Wang, Emily Gallagher, Jeroen Van de Kerkhove, Rik Jonckheere, Darko Trivkovic
Author Affiliations +
Abstract
The line edge roughness (LER) of the mask absorber increases as the critical dimension (CD) approaches the mask’s imaging limit. Mask LER has an impact on the corresponding wafer LER, especially in the case of EUV lithography because of the inverse dependence on exposure wavelength. Low-frequency mask LER is transferred directly to the wafer LER while high-frequency mask LER impacts the wafer image by reducing the image log slope (ILS). In this study, we designed a programmed random LER module and fabricated it on a state-of-the-art EUV mask to introduce controlled variations in LER amplitude while maintaining a similar spatial frequency to the reference mask LER. The unbiased 3-σ mask LER was extracted from the 36nm pitch line/space design, showing that programmed LER is transferred to mask LER. The mask was exposed with the ASML NXE:3400B EUV lithography scanner under focus exposure matrix (FEM) conditions. The transfer of mask LER to wafer LER exhibited a similar trend in programmed jog amplitude and step. Wafer LER increases when the exposure conditions deviate from the best dose or best focus, as the mask error enhancement factor (MEEF) increases and is proportional to the LER transfer function. It was observed that programmed LER is filtered through the illumination system, by comparing the power spectral density (PSD) of mask and wafer LER. The programmed LER led to increased wafer defects, specifically, wafer 3-σ unbiased LER above 2.4nm starts to increase wafer defects.
Conference Presentation
(2024) Published by SPIE. Downloading of the abstract is permitted for personal use only.
Jiahui Wang, Emily Gallagher, Jeroen Van de Kerkhove, Rik Jonckheere, and Darko Trivkovic "EUV lithography: LER design, mask, and wafer impact", Proc. SPIE 12953, Optical and EUV Nanolithography XXXVII, 129530A (10 April 2024); https://doi.org/10.1117/12.3011038
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KEYWORDS
Line edge roughness

Semiconducting wafers

Design

Light sources and illumination

Tunable filters

Extreme ultraviolet lithography

Scanning electron microscopy

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