With advanced semiconductor technologies continuing to evolve, defect prediction has experienced increased challenges because process issues involve complex interactions of multiple-layer layout patterns. This makes it more challenging than before for traditional pattern search techniques to identify, predict, and fix the process issues in a short time. Also, due to the increased cycle time to introduce new semiconductor technologies, for Integrated Circuit (IC) design houses with early technology engagements, finding potential defects in these new technologies and improving design quality become more challenging than before. Oftentimes utilization of previous learning experience for detecting and reducing defects becomes unavoidable. To overcome these difficulties, a feature-based artificial intelligence/machine learning (AI/ML) defect prediction tool has been developed and utilized to improve the prediction of potential process defects for IC designs. With this tool and its workflow, with the previous technology process improvement learning experience, the defect patterns are generated to improve design qualities for the new technology. The tool also provides functions of clustering and compressing the predicted defect patterns that facilitate finding root causes of the process defects. This paper will describe the new defect prediction flow, especially using previous technology process improvement data to analyze similar issues in the current technology designs.
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