CDSAXS study of 3D NAND channel hole etch pattern edge effects and etched hole pattern variance

Jin Zhang; Tian Lan; Ying Gao; Osman Sorkhabi; Yung-Yi Lin; Maggie Li; Dave Oak; Zhengquan Tan

doi:10.1117/12.3010927

9 April 2024 CDSAXS study of 3D NAND channel hole etch pattern edge effects and etched hole pattern variance

Jin Zhang, Tian Lan, Ying Gao, Osman Sorkhabi, Yung-Yi Lin, Maggie Li, Dave Oak, Zhengquan Tan

Proceedings Volume 12955, Metrology, Inspection, and Process Control XXXVIII; 1295539 (2024) https://doi.org/10.1117/12.3010927
Event: SPIE Advanced Lithography + Patterning, 2024, San Jose, California, United States

Conference Poster

Abstract

Critical dimension small angle X-ray scattering (CDSAXS) has been shown capable of measuring 3D NAND deep-etch structures, like channel holes and wordline cut for CD, CD profile, and center-line-shift (or tilt) non-destructively. New 3D NAND flash design architectures use taller stacks to increase memory capacity. Taller stacks result in deeper channel holes with aspect ratios exceeding 100:1. Etching high-aspect ratio holes remains the most critical step and requires a switch to cryogenic etch processes. This helps with throughput and lower cost, however, inner/outer hole loading, twisting, bowing, not open/partial etch can become more pronounced in low temperature processes. Reliable and non-destructive metrology is needed to address some of these challenges. In an effort to explore CDSAXS capability for this purpose, we report a systematic CDSAXS measurement study of 3D NAND channel hole etch for patterning and etch interaction in the following two aspects: 1) Patterning edge effects on the hole etch behavior, for CD, CD profile, tilt and distortion, specifically for holes at pattern edge (outer holes) and holes insider pattern (inner holes), and 2) hole etch behavior, especially versus etch depth, and its impact on the final hole pattern variance, e.g., pitch and hole-hole distance variance from the designed pattern (before etch). We study the patterning edge effects for a variety of process conditions and potential process optimization to minimize the edge effects. For hole etch pattern variance behavior, we focus on developing a feasible measurement methodology for characterizing the final etch pattern variance and potential metrology recipes.

Citation Download Citation

Jin Zhang, Tian Lan, Ying Gao, Osman Sorkhabi, Yung-Yi Lin, Maggie Li, Dave Oak, and Zhengquan Tan "CDSAXS study of 3D NAND channel hole etch pattern edge effects and etched hole pattern variance", Proc. SPIE 12955, Metrology, Inspection, and Process Control XXXVIII, 1295539 (9 April 2024); https://doi.org/10.1117/12.3010927

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