Paper
26 July 1999 Characterization of CD control for sub-0.18-μm lithographic patterning
Author Affiliations +
Abstract
It is well known that systematic within-chip dimension (CD) errors can strongly influence product yield and performance, especially in the case of microprocessors. It has been shown that this across chip linewidth variation (ACLV) dominates the CD error budge, and is comprised of multiple systematic and random effects, including substrate reflectivity, reticle CD errors, feature proximity, and lens aberrations. These effects have material, equipment, and process dependencies, with the results being that significant ACLV differences between nominally identical tools/processes can in some cases be observed. We present here a new analysis approach which allows for optimization of exposure/defocus conditions to minimize overall CD errors for a given process. Emphasis is on control of [(mean) + 3 sigma] of CD errors for a given exposure/defocus conditions. Input metrology data is obtained from electrical resistance probing, and data is presented for multiple 248 nm DUV processes and tools with CD ground rules ranging from 180 nm to 140 nm.
© (1999) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
John L. Sturtevant, John A. Allgair, Chong-Cheng Fu, Kent G. Green, Robert R. Hershey, Michael E. Kling, Lloyd C. Litt, Kevin D. Lucas, Bernard J. Roman, Gary Stanley Seligman, and Mike Schippers "Characterization of CD control for sub-0.18-μm lithographic patterning", Proc. SPIE 3679, Optical Microlithography XII, (26 July 1999); https://doi.org/10.1117/12.354335
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CITATIONS
Cited by 3 scholarly publications.
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KEYWORDS
Critical dimension metrology

Error analysis

Optical lithography

Semiconducting wafers

Deep ultraviolet

Metrology

Reticles

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