Paper
24 October 2000 Impact of boron penetration on gate oxide reliability and device performance in a dual-gate oxide process
Yunqiang Zhang, Chock Hing Gan, Xi Li, James Lee, David Vigar, Ravi Sundaresan
Author Affiliations +
Proceedings Volume 4227, Advanced Microelectronic Processing Techniques; (2000) https://doi.org/10.1117/12.405378
Event: International Symposium on Microelectronics and Assembly, 2000, Singapore, Singapore
Abstract
The effect of boron penetration on device performance and gate oxide reliability of P+ polysilicon gate MOSFET of a dual oxide process with salicide block module was investigated. To get stable non-salicided poly sheet resistance, a capping oxide is required before source/drain RTA anneal. It is found that the transistor performance and gate oxide reliability were degraded with the capping oxide. The optimization scheme by replacing BF2 with Boron for P+ implant is demonstrated.
© (2000) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Yunqiang Zhang, Chock Hing Gan, Xi Li, James Lee, David Vigar, and Ravi Sundaresan "Impact of boron penetration on gate oxide reliability and device performance in a dual-gate oxide process", Proc. SPIE 4227, Advanced Microelectronic Processing Techniques, (24 October 2000); https://doi.org/10.1117/12.405378
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KEYWORDS
Oxides

Boron

Reliability

Capacitors

Transistors

Diffusion

Field effect transistors

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