Patterning of advanced logic and memory devices requires atomic level fidelity. Atomic Layer Etching (ALE) emerged at the right time as the solution for these advanced patterning needs. ALE is a critical tool for integration and process engineers for realizing the roadmaps of logic and memory devices. In this course, we will introduce the fundamentals of atomic layer etching. We will compare ALE with conventional reactive ion etching (RIE) and isotropic etching technologies such as radical and thermal etching and analyze if and why ALE provides superior performance. We will cover a wide range of implementations of plasma driven directional atomic layer etching and thermal isotropic atomic layer etching. The performance benefits for these ALE techniques will be introduced and limitations will be discussed. In the second half of the course, we will review the use of ALE in EUV patterning, multipatterning, logic gate etching, contact etching, spacer etching, high k dielectric thinning, formation of advanced 3D NAND, 3D DRAM and emerging memory devices. Preferred chemistries and processing conditions will be introduced. The course will discuss use cases and requirements for plasma application in ALE.