Dr. Ariel Ben-Porath Profile

Dr. Ariel Ben-Porath

Product Unit Head at Applied Materials

SPIE Involvement:

Author

Proceedings Article | 10 May 2005 Paper

Design-based metrology: advanced automation for CD-SEM recipe generation

C. Tabery, L. Capodieci, C. Haidinyak, K. Shah, M. Threefoot, B. Choo, B. Singh, Y. Nehmadi, C. Ofek, O. Menadeva, A. Ben-Porath

Proceedings Volume 5752, (2005) https://doi.org/10.1117/12.601143

KEYWORDS: Optical proximity correction, Metrology, Computer aided design, Semiconducting wafers, Resolution enhancement technologies, Reticles, Calibration, Photomasks, Scanning electron microscopy, Data modeling

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The procedure for properly implementing OPC for a new technology node or chip design involves multiple steps: selection of the RET (resolution enhance technique), selection of design rules, OPC Model Building, OPC Verification, CD control quantification (across chip, reticle, wafer, focus, exposure, etc), calibration of Optical Rule Checks (ORC), and other verification steps. Many of these steps require up to thousands of wafer measurements, and while state-of-the-art CD-SEM tools provide automated metrology for production, manually creating a CD recipe with thousands of unique sites is extremely tedious and error-prone. This places a practical limit on both the quality and number of measurements that can be acquired during the technology development and qualification period. At the same time, the number of measurements required to qualify a new reticle design has increased drastically due to the growing complexity of RET and diminishing tolerances. To meet this challenge, a direct and automated link from the design systems to the process metrology tools is needed. Novel methodologies must also be developed to enable automated generation of teh recipe from the design inputs and to translate the flood of metrology results into information that can improve the design, mask data processing, or the patterning process. To facilitate this two-way data flow, a new framework has been created enabling true Design-Based Metrology (DBM), and an application named OPC-Check has been developed to operate within this framework. This DBM framework provides the common language and interface that facilitates the direct transfer of desired measurement locations from teh design to the metrology tool. This link is a critical element in Design for Manufacturability (DFM) efforts, a central theme in many presentations at Microlithography 2005. This article discusses the significant benefits of the tight integration of design and process metrology for OPC implementation in a new technology node, and provides some examples of the novel OPC-Check application as currently implemented at AMD SDC with Applied Materials CD-SEM tools.

Proceedings Article | 29 April 2004 Paper

Automatic defect classification using topography map from SEM photometric stereo

Sergio Serulnik, Jacob Cohen, Boris Sherman, Ariel Ben-Porath

Proceedings Volume 5378, (2004) https://doi.org/10.1117/12.532961

KEYWORDS: Scanning electron microscopy, Sensors, Electrons, 3D image processing, 3D vision, Reflectivity, 3D modeling, Image segmentation, Diffusion tensor imaging, Particles

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Proceedings Article | 12 July 2002 Paper

SEM review and discrete inspection of optically invisible defects in a production environment

Benoit Hinschberger, Christine Gombar, Laurent Ithier, Laurent Couturier, Boris Sherman, Ofer Rothlevi, Ariel Ben-Porath

Proceedings Volume 4692, (2002) https://doi.org/10.1117/12.475657

KEYWORDS: Metals, Scanning electron microscopy, Discrete inspection, Etching, Chemical mechanical planarization, Inspection, Microelectronics, Semiconducting wafers, Contamination, Manufacturing

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Proceedings Article | 2 June 2000 Paper

SEM-based ADC evaluation and integration in an advanced process fab

Jeff Ritchison, Ariel Ben-Porath, Eric Malocsay

Proceedings Volume 3998, (2000) https://doi.org/10.1117/12.386480

KEYWORDS: Scanning electron microscopy, Inspection, Sensors, Semiconducting wafers, Particles, Chemical mechanical planarization, Defect detection, Tin, Imaging systems, Yield improvement

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This paper summarizes the work completed as part of the Equipment Evaluation Program (EEP) for the Applied Materials SEMVision cX at Texas Instruments' KFAB facility. This tool employs real time Automatic Defect Classification (ADC) software in conjunction with an Automatic Defect Redetection (ADR) capability. The SEMVision cX utilizes a unique imaging system that employs multiple detectors to create several perspectives of the defect image. These perspectives enhance certain features of the defect that facilitate Automatic Defect Redetection of all defect types, and enable a rule- based ADC system. This tool was designed to meet the requirements of an advanced CMOS fab, which requires increased imaging resolution to resolve the ever-smaller defects that can cause yield loss. This evaluation program was begun to accomplish three objectives: (1) To evaluate the tool for automatic defect classification on advanced CMOS technology. (2) To increase speed/throughput/resolution of defect review. (3) To increase the accuracy of defect classification with the use of ADC. Of great importance for TI's advanced wafer fabs is the need for a defect review SEM that also has the capability of ADC to improve defect classification accuracy and also to improve queue time in the Yield Enhancement (YE) operations. In addition to this, the need to be fully integrated into the fab DMS (Defect Management System) and TI's Automation system is crucial for automating many routine functions for the YE group. With the YE group personnel freed from the many tedious data management tasks, they can work on yield issues in real-time. The SEMVision cX differs from usual fab SEM's in that it employs MPSI^TM (Multiple Perspective Imaging) which is three detectors, one at normal incidence to the wafer and two on either side of normal from the electron beam. This configuration of detectors gives added information to the ADC system, provides for robust redetection, and establishes a paradigm for automatic defect classification based on topography and material perspectives. The SEMVision cX met all of the requirements during the evaluation with the exception of the tilt and rotate capabilities. There were two areas that were involved in this evaluation, one was for the defect review SEM itself and the other was for Automatic Defect Classification (ADC). Also included in this evaluation was the integration of the SEMVision cX into TI's DMS (Defect Management System) and Automation networks.

Proceedings Article | 2 June 2000 Paper

Paradigm for selecting the optimum classifier in semiconductor automatic defect classification applications

Martin Hunt, James Goddard, James Mullens, Regina Ferrell, Bobby Whitus, Ariel Ben-Porath

Proceedings Volume 3998, (2000) https://doi.org/10.1117/12.386481

KEYWORDS: Semiconductors, Scanning electron microscopy, Neural networks, Semiconducting wafers, Defect detection, Electron microscopes, Manufacturing, Classification systems, Very large scale integration, Inspection

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The automatic classification of defects found on semiconductor wafers using a scanning electron microscope (SEM) is a complex task that involves many steps. The process includes re- detecting the defect, measuring attributes of the defect, and automatically assigning a classification. In many cases, especially during product ramp-up, and when multiple products are manufactured in the same line, there are few training examples for an automatic defect classification (ADC) system. This condition presents a problem for traditional supervised parametric and nonparametric learning techniques. In this paper we investigate the attributes of several approaches to ADC and compare their performance under a variety of available training data scenarios. We have selected to characterize the attributes and performance of a traditional K-nearest neighbor classifier, probabilistic neural network (PNN), and rule-based classifier in the context of SEM ADC. The PNN classifier is a nonparametric supervised classifier that is built around a radial basis function (RBF) neural network architecture. A basic summary of the PNN will be presented along with the generic strengths and weakness described in the literature and observed with actual semiconductor defect data. The PNN classifier is able to manage conditions such as non-convex class distributions and single class multiple clusters in feature space. A rule-based classifier producing built-in core classes provided by the Applied Materials SEMVision tool will be characterized in the context of both few examples and no examples. An extensive set of fab generated data is used to characterize the performance of these ADC approaches. Typical data sets contain from 30 to greater than 200. The number of classes in the data set range from 4 to more than 12. The conclusions reached from this analysis indicate that the strengths of each method are evident under specific conditions that are related to different stages within the VLSI yield curve, and to the number of different products in the line.

Conference Committee Involvement (6)

Data Analysis and Modeling for Patterning Control III

23 February 2006 | San Jose, California, United States

Data Analysis and Modeling for Process Control II

3 March 2005 | San Jose, California, United States

Data Analysis and Modeling for Process Control

26 February 2004 | Santa Clara, California, United States

Machine Vision Applications in Industrial Inspection XII

21 January 2004 | San Jose, California, United States

Process and Materials Characterization and Diagnostics in IC Manufacturing II

27 February 2003 | Santa Clara, CA, United States

Showing 5 of 6 Conference Committees

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